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Nicolas Gerlin
Nicolas Gerlin
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Towards fault simulation at mixed register-transfer/gate-level models
E Kaja, N Gerlin, M Vaddeboina, L Rivas, S Prebeck, Z Han, ...
2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2021
92021
MetaFS: Model-driven Fault Simulation Framework
E Kaja, N Gerlin, M Bora, K Devarajegowda, D Stoffel, W Kunz, W Ecker
2022 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2022
22022
Design of a Tightly-Coupled RISC-V Physical Memory Protection Unit for Online Error Detection
N Gerlin, E Kaja, M Bora, K Devarajegowda, D Stoffel, W Kunz, W Ecker
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022
22022
Fast and Accurate Model-Driven FPGA-based System-Level Fault Emulation
E Kaja, N Gerlin, M Bora, G Rutsch, K Devarajegowda, D Stoffel, W Kunz, ...
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration …, 2022
12022
Metfi: Model-driven fault simulation framework
E Kaja, N Gerlin, L Rivas, M Bora, K Devarajegowda, W Ecker
arXiv preprint arXiv:2204.13183, 2022
12022
Using Open-Source EDA Tools in an Industrial Design Flow
DS Lopera, P Kashyap, N Gerlin, S Wenzek, W Ecker
DVCON, 2022
12022
An Automated Exhaustive Fault Analysis Technique guided by Processor Formal Verification Methods
E Kaja, N Gerlin, B Zhao, DS Lopera, J Al Halabi, AS Khan, S Prebeck, ...
2024 25th International Symposium on Quality Electronic Design (ISQED), 1-8, 2024
2024
Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation
E Kaja, N Gerlin, R Kunzelmann, K Devarajegowda, W Ecker
2023 IEEE 16th International Symposium on Embedded Multicore/Many-core …, 2023
2023
Bits, Flips and RISCs
N Gerlin, E Kaja, F Vargas, L Lu, A Breitenreiter, J Chen, M Ulbricht, ...
2023 26th International Symposium on Design and Diagnostics of Electronic …, 2023
2023
Automated Thread Evaluation of Various RISC-V Alternatives using Random Instruction Generators
E Kaja, N Gerlin, D Stoffel, W Kunz, W Ecker
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