Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a coarse-grained reconfigurable array for flexible acceleration of dense linear algebra A Carsello, K Feng, T Kong, K Koul, Q Liu, J Melchert, G Nyengele, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 17 | 2022 |
OPTIMUS: A security-centric dynamic hardware partitioning scheme for processors that prevent microarchitecture state attacks H Omar, B D'Agostino, O Khan IEEE Transactions on Computers 69 (11), 1558-1570, 2020 | 12 | 2020 |
Seeds of SEED: Characterizing enclave-level parallelism in secure multicore processors B D’Agostino, O Khan 2021 International Symposium on Secure and Private Execution Environment …, 2021 | 4 | 2021 |
Amber: Coarse-grained reconfigurable array-based soc for dense linear algebra acceleration K Feng, A Carsello, T Kong, K Koul, Q Liu, J Melchert, G Nyengele, ... 2022 IEEE Hot Chips 34 Symposium (HCS), 1-30, 2022 | 1 | 2022 |
Amber: A 16-nm System-on-Chip With a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra K Feng, T Kong, K Koul, J Melchert, A Carsello, Q Liu, G Nyengele, ... IEEE Journal of Solid-State Circuits, 2023 | | 2023 |
G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators S Chattopadhyay, K Devarajegowda, B Zhao, F Lonsing, BA D’Agostino, ... 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | | 2023 |
Characterizing Enclave-level Parallelism in Secure Multicore Processors B D'Agostino University of Connecticut, 2021 | | 2021 |