Zhiru Zhang
Cited by
Cited by
High-level synthesis for FPGAs: From prototyping to deployment
J Cong, B Liu, S Neuendorffer, J Noguera, K Vissers, Z Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
Accelerating binarized convolutional neural networks with software-programmable fpgas
R Zhao, W Song, W Zhang, T Xing, JH Lin, M Srivastava, R Gupta, ...
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
Improving Neural Network Quantization without Retraining using Outlier Channel Splitting
R Zhao, Y Hu, J Dotzel, C De Sa, Z Zhang
International Conference on Machine Learning, 7543-7552, 2019
Application-specific instruction generation for configurable processor architectures
J Cong, Y Fan, G Han, Z Zhang
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
Reverse engineering convolutional neural networks through side-channel information leaks
W Hua, Z Zhang, GE Suh
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
An efficient and versatile scheduling algorithm based on SDC formulation
J Cong, Z Zhang
Proceedings of the 43rd annual Design Automation Conference, 433-438, 2006
AutoPilot: A platform-based ESL synthesis system
Z Zhang, Y Fan, W Jiang, G Han, C Yang, J Cong
High-Level Synthesis: From Algorithm to Digital Circuit, 99-112, 2008
Channel gating neural networks
W Hua, Y Zhou, CM De Sa, Z Zhang, GE Suh
Advances in Neural Information Processing Systems, 1884-1894, 2019
MatRaptor: A Sparse-Sparse Matrix Multiplication Accelerator Based on Row-Wise Product
N Srivastava, H Jin, J Liu, D Albonesi, Z Zhang
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing
YH Lai, Y Chi, Y Hu, J Wang, CH Yu, Y Zhou, J Cong, Z Zhang
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs
Y Zhou, U Gupta, S Dai, R Zhao, N Srivastava, H Jin, J Featherston, ...
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips
S Davidson, S Xie, C Torng, K Al-Hawai, A Rovinski, T Ajayi, L Vega, ...
IEEE Micro 38 (2), 30-41, 2018
GraphZoom: A multi-level spectral approach for accurate and scalable graph embedding
C Deng, Z Zhao, Y Wang, Z Zhang, Z Feng
2020 International Conference on Learning Representations (ICLR), 2020
Platform-based behavior-level and system-level synthesis
J Cong, Y Fan, G Han, W Jiang, Z Zhang
2006 IEEE International SOC Conference, 199-202, 2006
Fast and Accurate Estimation of Quality of Results in High-Level Synthesis with Machine Learning
S Dai, Y Zhou, H Zhang, E Ustun, EFY Young, Z Zhang
2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018
SDC-based modulo scheduling for pipeline synthesis
Z Zhang, B Liu
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 211-218, 2013
Architecture and synthesis for on-chip multicycle communication
J Cong, Y Fan, G Han, X Yang, Z Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations
N Srivastava, H Jin, S Smith, H Rong, D Albonesi, Z Zhang
2020 IEEE International Symposium on High Performance Computer Architecture …, 2020
Instruction set extension with shadow registers for configurable processors
J Cong, Y Fan, G Han, A Jagannathan, G Reinman, Z Zhang
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005
High-level power estimation and low-power design space exploration for FPGAs
D Chen, J Cong, Y Fan, Z Zhang
Proceedings of the 2007 Asia and South Pacific Design Automation Conference …, 2007
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