Advanced model order reduction techniques in VLSI design S Tan, L He Cambridge University Press, 2007 | 194 | 2007 |
Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings XD Tan, CJR Shi, D Lungeanu, JC Lee, LP Yuan Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 78-83, 1999 | 193 | 1999 |
Canonical symbolic analysis of large analog circuits with determinant decision diagrams CJR Shi, XD Tan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000 | 177 | 2000 |
Pathological element-based active device models and their application to symbolic analysis C Sánchez-López, FV Fernández, E Tlelo-Cuautle, SXD Tan IEEE Transactions on Circuits and Systems I: Regular Papers 58 (6), 1382-1395, 2011 | 145 | 2011 |
Physics-based electromigration assessment for power grid networks X Huang, T Yu, V Sukharev, SXD Tan Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 139 | 2014 |
Fast power/ground network optimization based on equivalent circuit modeling XDS Tan, CJR Shi Proceedings of the 38th annual Design Automation Conference, 550-554, 2001 | 102 | 2001 |
A systematic method for functional unit power estimation in microprocessors W Wu, L Jin, J Yang, P Liu, SXD Tan Proceedings of the 43rd annual Design Automation Conference, 554-557, 2006 | 98 | 2006 |
Design of analog circuits through symbolic analysis M Fakhfakh, E Tlelo-Cuautle, FV Fernández Bentham Science Publishers, 2012 | 94 | 2012 |
Dynamic FPGA routing for just-in-time FPGA compilation R Lysecky, F Vahid, SXD Tan Proceedings of the 41st annual design automation conference, 954-959, 2004 | 89 | 2004 |
Compact representation and efficient generation of s-expanded symbolic network functions for computer-aided analog circuit design CJR Shi, XD Tan IEEE Transactions on computer-aided design of integrated circuits and …, 2001 | 89 | 2001 |
Physics-based electromigration models and full-chip assessment for power grid networks X Huang, A Kteyan, SXD Tan, V Sukharev IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 82 | 2016 |
Hierarchical symbolic analysis of analog integrated circuits via determinant decision diagrams XD Tan, CJR Shi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000 | 79 | 2000 |
GPU-accelerated parallel sparse LU factorization method for fast circuit analysis K He, SXD Tan, H Wang, G Shi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (3 …, 2015 | 75 | 2015 |
Analytical modeling and characterization of electromigration effects for multibranch interconnect trees HB Chen, SXD Tan, X Huang, T Kim, V Sukharev IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 68 | 2016 |
Fast thermal simulation for architecture level dynamic thermal management P Liu, Z Qi, H Li, L Jin, W Wu, SXD Tan, J Yang ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005 | 65 | 2005 |
GPU friendly fast Poisson solver for structured power grid network analysis J Shi, Y Cai, W Hou, L Ma, SXD Tan, PH Ho, X Wang Proceedings of the 46th Annual Design Automation Conference, 178-183, 2009 | 61 | 2009 |
Compact lateral thermal resistance model of TSVs for fast finite-difference based thermal analysis of 3-D stacked ICs Z Liu, S Swarup, SXD Tan, HB Chen, H Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014 | 60 | 2014 |
Task migrations for distributed thermal management considering transient effects Z Liu, SXD Tan, X Huang, H Wang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (2), 397-401, 2014 | 57 | 2014 |
Symbolic analysis of analog circuits containing voltage mirrors and current mirrors E Tlelo-Cuautle, C Sánchez-López, E Martínez-Romero, SXD Tan Analog Integrated Circuits and Signal Processing 65, 89-95, 2010 | 57 | 2010 |
EM-based on-chip aging sensor for detection and prevention of counterfeit and recycled ICs K He, X Huang, SXD Tan 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 146-151, 2015 | 56 | 2015 |