Translation validation A Pnueli, M Siegel, E Singerman Tools and Algorithms for the Construction and Analysis of Systems: 4th …, 1998 | 755 | 1998 |
An overview of SAL S Bensalem, V Ganesh, Y Lakhnech, C Munoz, S Owre, H Rueß, ... NASA CONFERENCE PUBLICATION, 187-195, 2000 | 260 | 2000 |
The ForSpec temporal logic: A new temporal property-specification language R Armoni, L Fix, A Flaisher, R Gerth, B Ginsburg, T Kanza, A Landver, ... International Conference on Tools and Algorithms for the Construction and …, 2002 | 254 | 2002 |
A temporal language for SystemC D Tabakov, G Kamhi, MY Vardi, E Singerman 2008 Formal Methods in Computer-Aided Design, 1-9, 2008 | 77 | 2008 |
Formal verification of backward compatibility of microcode T Arons, E Elster, L Fix, S Mador-Haim, M Mishaeli, J Shalev, ... International Conference on Computer Aided Verification, 185-198, 2005 | 58 | 2005 |
On proving safety properties by integrating static analysis, theorem proving and abstraction V Rusu, E Singerman International Conference on Tools and Algorithms for the Construction and …, 1999 | 55 | 1999 |
Transaction based pre-to-post silicon validation E Singerman, Y Abarbanel, S Baartmans Proceedings of the 48th Design Automation Conference, 564-568, 2011 | 37 | 2011 |
Fair synchronous transition systems and their liveness proofs A Pnueli, N Shankar, E Singerman Formal Techniques in Real-Time and Fault-Tolerant Systems: 5th International …, 1998 | 31 | 1998 |
Validation of soc firmware-hardware flows: Challenges and solution directions Y Abarbanel, E Singerman, MY Vardi Proceedings of the 51st Annual Design Automation Conference, 1-4, 2014 | 30 | 2014 |
Efficient symbolic simulation of low level software T Arons, E Elster, S Ozer, J Shalev, E Singerman Proceedings of the conference on Design, automation and test in Europe, 825-830, 2008 | 30 | 2008 |
GSTE is partitioned model checking R Sebastiani, E Singerman, S Tonetta, MY Vardi Computer Aided Verification: 16th International Conference, CAV 2004, Boston …, 2004 | 29 | 2004 |
From visual to logical formalisms for SoC validation R Fraer, D Keren, Z Khasidashvili, A Novakovsky, A Puder, E Singerman, ... 2014 Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign …, 2014 | 15 | 2014 |
Case study: Integrating FV and DV in the Verification of the Intel® Core^{TM} 2 Duo Microprocessor A Flaisher, A Gluska, E Singerman Formal Methods in Computer Aided Design (FMCAD'07), 192-195, 2007 | 12 | 2007 |
More on nonregular PDL: Finite models and Fibonacci-like programs D Harel, E Singerman information and computation 128 (2), 109-118, 1996 | 12 | 1996 |
satGSTE: Combining the abstraction of GSTE with the capacity of a SAT solver J Yang, R Gil, E Singerman Designing Correct Circuits (DCC’04), 360-367, 2004 | 10 | 2004 |
Computation paths logic: An expressive, yet elementary, process logic D Harel, E Singerman Annals of Pure and Applied Logic 96 (1-3), 167-186, 1999 | 9 | 1999 |
Validation of software execution paths T Arons, E Elster, M Mishaeli, E Singerman, A Tiemeyer US Patent App. 11/477,847, 2008 | 7 | 2008 |
Embedded software validation: Applying formal techniques for coverage and test generation T Arons, E Elster, T Murphy, E Singerman Seventh International Workshop on Microprocessor Test and Verification (MTV …, 2006 | 7 | 2006 |
GSTE is partitioned model checking R Sebastiani, E Singerman, S Tonetta, MY Vardi Formal Methods in System Design 31, 177-196, 2007 | 4 | 2007 |
Computation paths logic: An expressive, yet elementary, process logic D Harel, E Singerman Lecture notes in computer science, 408-418, 1997 | 3 | 1997 |