| Reducing FPGA compile time with separate compilation for FPGA building blocks Y Xiao, D Park, A Butt, H Giesen, Z Han, R Ding, N Magnezi, R Rubin, ... 2019 international conference on field-programmable technology (ICFPT), 153-161, 2019 | 35 | 2019 |
| Case for fast FPGA compilation using partial reconfiguration D Park, Y Xiao, N Magnezi, A DeHon 2018 28th International Conference on Field Programmable Logic and …, 2018 | 23 | 2018 |
| Fast and flexible FPGA development using hierarchical partial reconfiguration D Park, Y Xiao, A DeHon 2022 International Conference on Field-Programmable Technology (ICFPT), 1-10, 2022 | 14 | 2022 |
| HiPR: High-level partial reconfiguration for fast incremental FPGA compilation Y Xiao, A Hota, D Park, A DeHon 2022 32nd international conference on field-programmable logic and …, 2022 | 14 | 2022 |
| ExHiPR: Extended high-level partial reconfiguration for fast incremental FPGA compilation Y Xiao, D Park, ZJ Niu, A Hota, A Dehon ACM Transactions on Reconfigurable Technology and Systems 17 (2), 1-28, 2024 | 4 | 2024 |
| REFINE: Runtime Execution Feedback for INcremental Evolution on FPGA Designs D Park, A DeHon Proceedings of the 2024 ACM/SIGDA International Symposium on Field …, 2024 | 1 | 2024 |
| Asymmetry in butterfly fat tree FPGA noc D Park, Z Yao, Y Xiao, A DeHon 2023 International Conference on Field Programmable Technology (ICFPT), 227-231, 2023 | 1 | 2023 |
| Software-like Incremental Refinement on FPGA using Partial Reconfiguration D Park University of Pennsylvania, 2024 | | 2024 |
Andre DeHonUniversity of PennsylvaniaVerified email at acm.org
