Jonathan Piat
Jonathan Piat
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An open framework for rapid prototyping of signal processing applications
M Pelcat, J Piat, M Wipliez, S Aridhi, JF Nezan
EURASIP journal on embedded systems 2009, 1-13, 2009
Physical layer multi-core prototyping: A dataflow-based approach for LTE eNodeB
M Pelcat, S Aridhi, J Piat, JF Nezan
Springer, 2013
A system-level architecture model for rapid prototyping of heterogeneous multicore embedded systems
M Pelcat, JF Nezan, J Piat, J Croizer, S Aridhi
Conference on Design and Architectures for Signal and Image Processing …, 2009
Interface-based hierarchy for synchronous data-flow graphs
J Piat, SS Bhattacharyya, M Raulet
2009 IEEE Workshop on Signal Processing Systems, 145-150, 2009
Fpga design of ekf block accelerator for 3d visual slam
DT Tertei, J Piat, M Devy
Computers & Electrical Engineering 55, 123-137, 2016
FPGA design and implementation of a matrix multiplier based accelerator for 3D EKF SLAM
DT Tertei, J Piat, M Devy
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
Active localization of an intermittent sound source from a moving binaural sensor
A Portello, G Bustamante, P Danès, J Piat, J Manhes
European Acoustics Association Forum Acusticum, 12p., 2014
Multi-core code generation from interface based hierarchy
J Piat, SS Bhattacharyya, M Pelcat, M Raulet
Conference on Design and Architectures for Signal and Image Processing …, 2009
An extensible framework for fast prototyping of multiprocessor dataflow applications
J Piat, M Raulet, M Pelcat, P Mu, O Déforges
2008 3rd International Design and Test Workshop, 215-220, 2008
Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework
M Raulet, J Piat, C Lucarz, M Mattavelli
2008 IEEE Workshop on Signal Processing Systems, 293-298, 2008
FPGA based accelerator for visual features detection
F Brenot, P Fillatreau, J Piat
2015 IEEE International Workshop of Electronics, Control, Measurement …, 2015
Automatic synthesis of parsers and validation of bitstreams within the MPEG reconfigurable video coding framework
C Lucarz, J Piat, M Mattavelli
Journal of Signal Processing Systems 63 (2), 215-225, 2011
HW/SW co-design of a visual SLAM application
J Piat, P Fillatreau, D Tortei, F Brenot, M Devy
Journal of Real-Time Image Processing 17 (3), 667-689, 2020
An LLVM-based decoder for MPEG reconfigurable video coding
J Gorin, M Wipliez, J Piat, F Préteux, M Raulet
2010 IEEE Workshop On Signal Processing Systems, 81-86, 2010
FPGA based hardware acceleration of a BRIEF correlator module for a monocular SLAM application
F Brenot, J Piat, P Fillatreau
Proceedings of the 10th International Conference on Distributed Smart Camera …, 2016
Real time vision system for obstacle detection and localization on FPGA
A Alhamwi, B Vandeportaele, J Piat
International Conference on Computer Vision Systems, 80-90, 2015
Dataflow model of computation
M Pelcat, S Aridhi, J Piat, JF Nezan
Physical Layer Multi-Core Prototyping, 53-75, 2013
Embedded vision-based slam: A model-driven approach
J Piat, DA Márquez-Gámez, M Devy
2013 Conference on Design and Architectures for Signal and Image Processing …, 2013
Loop transformations for interface-based hierarchies IN SDF graphs
J Piat, SS Bhattacharyya, M Raulet
ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010
Data Flow modeling and multi-core optimization of loop patterns
J Piat
PhD thesis, INSA Rennes, 2010. 53, 99, 2010
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