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Yi Zhong
Yi Zhong
Verified email at mail.tsinghua.edu.cn
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Cited by
Year
27.1 A 250kHz-BW 93dB-SNDR 4th-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering
J Liu, D Li, Y Zhong, X Tang, N Sun
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 369-371, 2021
452021
A Second-Order Purely VCO-Based CT ADC Using a Modified DPLL Structure in 40-nm CMOS
Y Zhong, S Li, X Tang, L Shen, W Zhao, S Wu, N Sun
IEEE Journal of Solid-State Circuits 55 (2), 356-368, 2019
302019
A 0.004-mm 200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp
M Zhan, L Jie, X Tang, Y Zhong, N Sun
IEEE Journal of Solid-State Circuits, 2023
242023
A 10-mW 10-ENoB 1-GS/s ring-amp-based pipelined TI-SAR ADC with split MDAC and switched reference decoupling capacitor
M Zhan, L Jie, Y Zhong, N Sun
IEEE Journal of Solid-State Circuits, 2023
132023
An 81.5 dB-DR 1.25 MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer
Y Zhong, X Tang, J Liu, W Zhao, S Li, N Sun
2021 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2021
122021
A Second-Order Purely VCO-Based CT Δ∑ ADC Using a Modified DPLL in 40-nm CMOS
Y Zhong, S Li, A Sanyal, X Tang, L Shen, S Wu, N Sun
2018 IEEE Asian Solid-State Circuits Conference (A-SSCC), 93-94, 2018
102018
Advances in voltage-controlled-oscillator-based δσ ADCs
S Li, A Sanyal, K Lee, Y Yoon, X Tang, Y Zhong, K Ragab, N Sun
IEICE Transactions on Electronics 102 (7), 509-519, 2019
92019
10.6 A 150KHz-BW 15-ENOB incremental zoom ADC with skipped sampling and single buffer embedded noise-shaping SAR quantizer
Z Wang, L Jie, Z Kong, M Zhan, Y Zhong, Y Wang, X Tang
2023 IEEE International Solid-State Circuits Conference (ISSCC), 9-11, 2023
82023
A survey of voltage-controlled-oscillator-based ΔΣ ADCs
Y Zhong, N Sun
Tsinghua Science and Technology 27 (3), 472-480, 2021
82021
A 78.6 dB-SNDR 520mVpp-full-scale 620MΩ-Zin 105dBCMRR VCO-based Sensor Readout Circuit Using FVF-Based Gm-Input Structure
Y Zhong, L Jie, N Sun
2022 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-3, 2022
62022
A 3.7 mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration
M Gu, Y Tao, X He, Y Zhong, L Jie, N Sun
ESSCIRC 2023-IEEE 49th European Solid State Circuits Conference (ESSCIRC …, 2023
32023
A 12b 1GS/s pipelined ADC with digital background calibration of inter-stage gain, capacitor mismatch, and Kick-back errors
M Gu, Y Zhong, L Jie, N Sun
ESSCIRC 2023-IEEE 49th European Solid State Circuits Conference (ESSCIRC …, 2023
22023
A 0.39-mm Stacked Standard-CMOS Humidity Sensor Using a Charge-Redistribution Correlated Level Shifting Floating Inverter Amplifier and a VCO-Based Zoom …
H Li, K Du, Y Bao, Y Dong, J Ru, H Xiao, H Zhang, Z Wang, Y Zhong, ...
IEEE Journal of Solid-State Circuits, 2023
22023
A Second-Order VCO-Based ΔΣ ADC with Fully Digital Feedback Summation
C Xing, Y Zhong, J Shao, P Chen, L Jie, N Sun
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 3215-3218, 2022
22022
An 80.2-to-89.1 dB-SNDR 24k-to-200kHz-BW VCO-Based Synthesized? S ADC with 105dB SFDR in 28-nm CMOS
Y Zhong, M Zhan, W Wang, X Tang, L Jie, N Sun
2023 IEEE Custom Integrated Circuits Conference (CICC), 1-2, 2023
12023
A Fast Converging Correlation-Based Background Timing Skew Calibration Technique by Digital Windowing for Time-Interleaved ADCs
Y Tao, K Ragab, J Shao, P Chen, Y Zhong, L Jie, N Sun
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 21-25, 2022
12022
A 1-GS/s 11-b Time-Interleaved SAR ADC With Robust, Fast, and Accurate Autocorrelation-Based Background Timing-Skew Calibration
M Gu, Y Tao, X He, Y Zhong, L Jie, N Sun
IEEE Journal of Solid-State Circuits, 2024
2024
A 1.25 MHz Bandwidth 86.4 dB SNDR third-order VCO-based ADC design
C Xing, J Shao, C Men, Y Zhong
2024 4th International Conference on Electronics, Circuits and Information …, 2024
2024
A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs
Y Tao, Y Zhong, J Shao, C Men, L Jie, N Sun
2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2024
2024
9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMs
X He, M Gu, H Jiang, Y Zhong, N Sun, L Jie
2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 172-174, 2024
2024
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