Jinho Lee
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Deep neural networks with weighted spikes
J Kim, H Kim, S Huh, J Lee, K Choi
Neurocomputing 311, 373-386, 2018
In-memory database acceleration on FPGAs: a survey
J Fang, YTB Mulder, J Hidders, J Lee, HP Hofstee
The VLDB Journal 29, 33-59, 2020
Extrav: boosting graph processing near storage with a coherent accelerator
J Lee, H Kim, S Yoo, K Choi, HP Hofstee, GJ Nam, MR Nutter, D Jamsek
Proceedings of the VLDB Endowment 10 (12), 1706-1717, 2017
Qimera: Data-free quantization with synthetic boundary supporting samples
K Choi, D Hong, N Park, Y Kim, J Lee
Advances in Neural Information Processing Systems 34, 14835-14847, 2021
Dance: Differentiable accelerator/network co-exploration
K Choi, D Hong, H Yoon, J Yu, Y Kim, J Lee
2021 58th ACM/IEEE Design Automation Conference (DAC), 337-342, 2021
TEI-NoC: Optimizing ultralow power NoCs exploiting the temperature effect inversion
K Han, JJ Lee, J Lee, W Lee, M Pedram
IEEE Transactions on Computer-Aided Design of Integrated Circuits and íK, 2017
GradPIM: A practical processing-in-DRAM architecture for gradient descent
H Kim, H Park, T Kim, K Cho, E Lee, S Ryu, HJ Lee, K Choi, J Lee
2021 IEEE International Symposium on High-Performance Computer Architecture íK, 2021
Dataflow mirroring: Architectural support for highly efficient fine-grained spatial multitasking on systolic-array npus
J Lee, J Choi, J Kim, J Lee, Y Kim
2021 58th ACM/IEEE Design Automation Conference (DAC), 247-252, 2021
It's all in the teacher: Zero-shot quantization brought closer to the teacher
K Choi, HY Lee, D Hong, J Yu, N Park, Y Kim, J Lee
Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern íK, 2022
A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections
J Lee, K Choi
2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 1-2, 2013
An adaptive routing algorithm for 3D mesh NoC with limited vertical bandwidth
M Zhu, J Lee, K Choi
2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip íK, 2012
My being to your place, your being to my place: Co-present robotic avatars create illusion of living together
B Kang, I Hwang, J Lee, S Lee, T Lee, Y Chang, MK Lee
Proceedings of the 16th Annual International Conference on Mobile Systems íK, 2018
Mapping and scheduling of tasks and communications on many-core SoC under local memory constraint
J Lee, MK Chung, YG Cho, S Ryu, JH Ahn, K Choi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and íK, 2013
Buffered compares: Excavating the hidden parallelism inside DRAM architectures with lightweight logic
J Lee, JH Ahn, K Choi
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE íK, 2016
Tree-mesh heterogeneous topology for low-latency noc
S Han, J Lee, K Choi
Proceedings of the 2014 International Workshop on Network on Chip íK, 2014
Optimus-CC: Efficient large NLP model training with 3D parallelism aware communication compression
J Song, J Yim, J Jung, H Jang, HJ Kim, Y Kim, J Lee
Proceedings of the 28th ACM International Conference on Architectural íK, 2023
AutoReCon: Neural architecture search-based reconstruction for data-free compression
B Zhu, P Hofstee, J Peltenburg, J Lee, Z Alars
arXiv preprint arXiv:2105.12151, 2021
Redelf: An energy-efficient deadlock-free routing for 3d nocs with partial vertical connections
J Lee, K Kang, K Choi
ACM Journal on Emerging Technologies in Computing Systems (JETC) 12 (3), 1-22, 2015
Deflection routing in 3D network-on-chip with TSV serialization
J Lee, D Lee, S Kim, K Choi
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 29-34, 2013
3D network-on-chip with wireless links through inductive coupling
J Lee, M Zhu, K Choi, JH Ahn, R Sharma
2011 International SoC Design Conference, 353-356, 2011
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