| Piercing logic locking keys through redundancy identification L Li, A Orailoglu 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2019 | 69 | 2019 |
| Benchmarking at the frontier of hardware security: Lessons from logic locking B Tan, R Karri, N Limaye, A Sengupta, O Sinanoglu, MM Rahman, ... arXiv preprint arXiv:2006.06806, 2020 | 35 | 2020 |
| JANUS-HD: Exploiting FSM Sequentiality and Synthesis Flexibility in Logic Obfuscation to Thwart SAT Attack While Offering Strong Corruption L Li, A Orailoglu 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022 | 16 | 2022 |
| Shielding logic locking from redundancy attacks L Li, A Orailoglu 2019 IEEE 37th VLSI Test Symposium (VTS), 1-6, 2019 | 13 | 2019 |
| JANUS: Boosting Logic Obfuscation Scope Through Reconfigurable FSM Synthesis L Li, A Orailoglu 2021 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2021 | 12 | 2021 |
| Redundancy attack: Breaking logic locking through oracleless rationality analysis L Li, A Orailoglu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 8 | 2022 |
| Thwarting Reverse Engineering Attacks through Keyless Logic Obfuscation L Li, A Orailoglu IEEE VLSI Test Symposium 2023, 2023 | 3 | 2023 |
| ClearLock: Deterring Hardware Reverse Engineering Attacks in a White-Box L Li, A Orailoglu 2023 IEEE 32nd Asian Test Symposium (ATS), 1-6, 2023 | | 2023 |
Alex OrailogluProfessor of Computer Science & Engineering, University of California San DiegoVerified email at cs.ucsd.edu
