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Smrutilekha Samanta
Smrutilekha Samanta
Research scholar NIT ROURKELA
Verified email at nitrkl.ac.in
Title
Cited by
Cited by
Year
Threshold voltage extraction techniques adaptable from sub‐micron CMOS to large‐area oxide TFT technologies
S Samanta, B Tiwari, PG Bahubalindruni, P Barquinha, J Goes
International Journal of Circuit Theory and Applications 45 (12), 2201-2210, 2017
82017
A 1.8 V 8-bit 500 MSPS segmented current steering DAC with> 66 dB SFDR
S Samanta, S Sarkar
2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 13-17, 2020
62020
A pairwise swap enabled randomized DEM addressing intersegment mismatch for current steering digital-to-analog converters
S Samanta, S Sarkar
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (9 …, 2022
42022
A 10-bit 500 MSPS Segmented CS-DAC of> 77 dB SFDR upto the Nyquist with Hexa-decal biasing
S Samanta, S Sarkar
2020 24th International Symposium on VLSI Design and Test (VDAT), 1-4, 2020
32020
A 10-bit CS-DAC using Fully Random Rotation based DEM and code independent output impedance compensation
S Samanta, S Sarkar
AEU-International Journal of Electronics and Communications 161, 154528, 2023
22023
Implementation of 10bit SerDes for Gigabit Ethernet PHY
S Samanta, A Dastidar
2015 International Conference on Man and Machine Interfacing (MAMI), 1-5, 2015
12015
Mismatch error compensation of hybrid CS‐DAC to achieve high figure of merit utilizing on‐chip self‐healing assisted swap‐enabled randomization technique
S Samanta, S Sarkar
International Journal of Circuit Theory and Applications 52 (5), 2191-2204, 2024
2024
An on-chip partial self-healing calibration technique for 10-bit reused distributed current steering DAC
S Samanta, S Sarkar
Analog Integrated Circuits and Signal Processing 113 (3), 353-360, 2022
2022
Dynamic Switching Compensation Technique Mitigating Code-Dependent Switching Distortion in CS-DACs
S Samanta, S Sarkar
2022 IEEE 19th India Council International Conference (INDICON), 1-5, 2022
2022
Nonlinear Semiconductor Device Modeling using Neural Networks
S Samanta
Journal of VLSI Design Tools & Technology 4 (3), 1-6, 2014
2014
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