| Accurate models for estimating area and power of FPGA implementations L Deng, K Sobti, C Chakrabarti 2008 IEEE International Conference on Acoustics, Speech and Signal …, 2008 | 66 | 2008 |
| Accurate area, time and power models for FPGA-based implementations L Deng, K Sobti, Y Zhang, C Chakrabarti Journal of Signal Processing Systems 63, 39-50, 2011 | 50 | 2011 |
| An automated framework for accelerating numerical algorithms on reconfigurable platforms using algorithmic/architectural optimization JS Kim, L Deng, P Mangalagiri, K Irick, K Sobti, M Kandemir, V Narayanan, ... IEEE Transactions on Computers 58 (12), 1654-1667, 2009 | 30 | 2009 |
| FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data CL Yu, JS Kim, L Deng, S Kestur, V Narayanan, C Chakrabarti Journal of Signal Processing Systems 64, 109-122, 2011 | 29 | 2011 |
| A special-purpose compiler for look-up table and code generation for function evaluation Y Zhang, L Deng, P Yedlapalli, SP Muralidhara, H Zhao, M Kandemir, ... 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 23 | 2010 |
| Automated optimization of look-up table implementation for function evaluation on FPGAs L Deng, C Chakrabarti, N Pitsianis, X Sun Mathematics for Signal and Information Processing 7444, 353-361, 2009 | 18 | 2009 |
| Efficient function evaluations with lookup tables for structured matrix operations K Sobti, L Deng, C Chakrabarti, N Pitsianis, X Sun, J Kim, P Mangalagiri, ... 2007 IEEE Workshop on Signal Processing Systems, 463-468, 2007 | 17 | 2007 |
| TANOR: A tool for accelerating N-body simulations on reconfigurable platform JS Kim, P Mangalagiri, K Irick, M Kandemir, V Narayanan, K Sobti, L Deng, ... 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 14 | 2007 |
| Geometric tiling for reducing power consumption in structured matrix operations G Chen, L Xue, J Kim, K Sobti, L Deng, X Sun, N Pitsianis, C Chakrabarti, ... 2006 IEEE International SOC Conference, 113-114, 2006 | 13 | 2006 |
| Efficient image reconstruction using partial 2D Fourier transform L Deng, CL Yu, C Chakrabarti, J Kim, V Narayanan 2008 IEEE Workshop on Signal Processing Systems, 49-54, 2008 | 8 | 2008 |
| A Lower Power Consumption, Self Returning Voltage Level Shifter Circuit Implemented with LDMOS D Lanping, W Jimin CHINESE JOURNAL OF SEMICONDUCTORS-CHINESE EDITION- 26 (10), 2028, 2005 | 3 | 2005 |
| Algorithm-architecture codesign for structured matrix operations on reconfigurable systems J Kim, P Mangalagiri, M Kandemir, V Narayanan, L Deng, K Sobti, ... Technical Report CS-2006-11, Department of Computer Science, Duke University, 2006 | 1 | 2006 |
| Reconfigurable Systems-An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization JS Kim, L Deng, P Mangalagiri, K Irick, K Sobti, M Kandemir, V Narayanan, ... IEEE Transactions on Computers 58 (12), 1654, 2009 | | 2009 |
| Algorithm-Architecture Co-exploration for Signal Processing on Reconfigurable Platform L Deng Arizona State University, 2009 | | 2009 |
| Designand Application of HV LDMOS FET L Deng Tsinghua University, Beijing, China, 2005 | | 2005 |
Chaitali ChakrabartiProfessor of Electrical Engineering, SECEE, Arizona State UniversityVerified email at asu.edu
