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Shounak  Dhar
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Dreamplace: Deep learning toolkit-enabled gpu acceleration for modern vlsi placement
Y Lin, S Dhar, W Li, H Ren, B Khailany, DZ Pan
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
2542019
Electronic-photonic arithmetic logic unit for high-speed computing
Z Ying, C Feng, Z Zhao, S Dhar, H Dalir, J Gu, Y Cheng, R Soref, DZ Pan, ...
Nature communications 11 (1), 2154, 2020
1332020
UTPlaceF: A routability-driven FPGA placer with physical and congestion aware packing
W Li, S Dhar, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
972017
Silicon microdisk-based full adders for optical computing
Z Ying, Z Wang, Z Zhao, S Dhar, DZ Pan, R Soref, RT Chen
Optics letters 43 (5), 983-986, 2018
632018
Electro-optic ripple-carry adder in integrated silicon photonics for optical computing
Z Ying, S Dhar, Z Zhao, C Feng, R Mital, CJ Chung, DZ Pan, RA Soref, ...
IEEE journal of selected topics in quantum electronics 24 (6), 1-10, 2018
522018
Comparison of microrings and microdisks for high-speed optical modulation in silicon photonics
Z Ying, Z Wang, Z Zhao, S Dhar, DZ Pan, R Soref, RT Chen
Applied Physics Letters 112 (11), 2018
382018
Automated logic synthesis for electro-optic logic-based integrated optical computing
Z Ying, Z Zhao, C Feng, R Mital, S Dhar, DZ Pan, R Soref, RT Chen
Optics express 26 (21), 28002-28012, 2018
332018
Logic synthesis for energy-efficient photonic integrated circuits
Z Zhao, Z Wang, Z Ying, S Dhar, RT Chen, DZ Pan
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 355-360, 2018
302018
UTPlaceF 2.0: A high-performance clock-aware FPGA placement engine
W Li, Y Lin, M Li, S Dhar, DZ Pan
ACM Transactions on Design Automation of Electronic Systems (TODAES) 23 (4 …, 2018
252018
An effective timing-driven detailed placement algorithm for FPGAs
S Dhar, MA Iyer, S Adya, L Singhal, N Rubanov, DZ Pan
Proceedings of the 2017 ACM on International Symposium on Physical Design …, 2017
192017
GDP: GPU accelerated detailed placement
S Dhar, DZ Pan
2018 IEEE High Performance extreme Computing Conference (HPEC), 1-7, 2018
182018
Optical computing on silicon-on-insulator-based photonic integrated circuits
Z Zhao, Z Wang, Z Ying, S Dhar, RT Chen, DZ Pan
2017 IEEE 12th International Conference on ASIC (ASICON), 472-475, 2017
182017
Fpga accelerated fpga placement
S Dhar, L Singhal, M Iyer, D Pan
2019 29th International Conference on Field Programmable Logic and …, 2019
152019
Detailed placement for modern FPGAs using 2D dynamic programming
S Dhar, S Adya, L Singhal, MA Iyer, DZ Pan
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
122016
Methods for reducing delay on integrated circuits by identifying candidate placement locations in a leveled graph
S Dhar, MA Iyer, L Singhal, N Rubanov, S Adya
US Patent 10,318,686, 2019
92019
On-chip microring resonator based electro-optic full adder for optical computing
Z Ying, Z Wang, S Dhar, Z Zhao, DZ Pan, RT Chen
CLEO: Science and Innovations, JW2A. 147, 2017
82017
FPGA-accelerated spreading for global placement
S Dhar, L Singhal, MA Iyer, DZ Pan
2019 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2019
42019
Automated logic synthesis for electro-optic computing in integrated photonics
Z Ying, Z Zhao, C Feng, R Mital, S Dhar, DZ Pan, RT Chen
Optical Interconnects XIX 10924, 75-82, 2019
42019
Optical switches based carry-ripple adder for future high-speed and low-power consumption optical computing
Z Wang, Z Ying, S Dhar, Z Zhao, DZ Pan, RT Chen
CLEO: Science and Innovations, STh1N. 2, 2017
42017
Microdisk-based full adders for optical computing in silicon photonics
Z Ying, Z Wang, Z Zhao, S Dhar, DZ Pan, R Soref, RT Chen
2018 Conference on Lasers and Electro-Optics (CLEO), 1-2, 2018
32018
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