| TCAD simulations of FDSOI devices down to deep cryogenic temperature E Catapano, M Cassé, F Gaillard, S de Franceschi, T Meunier, M Vinet, ... Solid-State Electronics 194, 108319, 2022 | 13 | 2022 |
| A new FDSOI spin qubit platform with 40nm effective control pitch T Bédécarrats, BC Paz, BM Diaz, H Niebojewski, B Bertrand, N Rambal, ... 2021 IEEE International Electron Devices Meeting (IEDM), 1-4, 2021 | 11 | 2021 |
| On the zero temperature coefficient in cryogenic FD-SOI MOSFETs E Catapano, TM Frutuoso, M Casse, G Ghibaudo IEEE Transactions on Electron Devices 70 (3), 845-849, 2022 | 10 | 2022 |
| Challenges and perspectives in the modeling of spin qubits YM Niquet, L Hutin, BM Diaz, B Venitucci, J Li, V Michal, ... 2020 IEEE International Electron Devices Meeting (IEDM), 30.1. 1-30.1. 4, 2020 | 8 | 2020 |
| Statistical and electrical modeling of FDSOI four-gate qubit MOS devices at room temperature E Catapano, G Ghibaudo, M Cassé, TM Frutuoso, BC Paz, T Bedecarrats, ... IEEE Journal of the Electron Devices Society 9, 582-590, 2021 | 6 | 2021 |
| Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures E Catapano, A Aprà, M Cassé, F Gaillard, S de Franceschi, T Meunier, ... Solid-State Electronics 193, 108291, 2022 | 5 | 2022 |
| Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration TM Frutuoso, J Lugo-Alvarez, X Garros, L Brunet, J Lacord, L Gerrer, ... 2021 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2021 | 4 | 2021 |
| Material and integration challenges for large scale Si quantum computing M Vinet, T Bédécarrats, BC Paz, B Martinez, E Chanrion, E Catapano, ... 2021 IEEE International Electron Devices Meeting (IEDM), 14.2. 1-14.2. 4, 2021 | 3 | 2021 |
| Cryogenic MOSFET subthreshold current: From resistive networks to percolation transport in 1-D systems E Catapano, M Cassé, G Ghibaudo IEEE Transactions on Electron Devices, 2023 | 2 | 2023 |
| Characterization and Lambert–W Function based modeling of FDSOI five-gate qubit MOS devices down to cryogenic temperatures E Catapano, A Aprà, M Cassé, F Gaillard, S de Franceschi, T Meunier, ... 2021 Joint International EUROSOI Workshop and International Conference on …, 2021 | 2 | 2021 |
| Characterization and Modeling of FD-SOI Qubit MOS devices down to deep cryogenic temperatures for quantum computing applications E Catapano Université Grenoble Alpes [2020-....], 2022 | 1 | 2022 |
| Methodology for an efficient characterization flow of industrial grade Si-based qubit devices LC Contamin, BC Paz, BM Diaz, B Bertrand, H Niebojewski, ... 2022 International Electron Devices Meeting (IEDM), 22.1. 1-22.1. 4, 2022 | 1 | 2022 |
| Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500° C devices for 3D sequential integration TM Frutuoso, X Garros, P Batude, L Brunet, J Lacord, B Sklenard, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 1 | 2022 |
| Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures (vol 193, 108291, 2022) E Catapano, A Apra, M Casse, F Gaillard, S de Franceschi, T Meunier, ... SOLID-STATE ELECTRONICS 199, 2023 | | 2023 |
| Corrigendum to" TCAD simulations of FDSOI devices down to deep cryogenic temperature"[Solid-State Electron. 194 (2022) 108319] E Catapano, M Cassé, F Gaillard, S de Franceschi, T Meunier, M Vinet, ... Solid State Electronics 199, 108541, 2023 | | 2023 |
| Corrigendum to" Modeling and simulations of FDSOI five-gate qubit MOS devices down to deep cryogenic temperatures"[Solid State Electron. 193 (2022) 108291] E Catapano, A Aprà, M Cassé, F Gaillard, S de Franceschi, T Meunier, ... Solid State Electronics 199, 108540, 2023 | | 2023 |
| Caractérisation et modélisation de dispositifs FD-SOI Qubit MOS jusqu'à températures cryogéniques pour applications quantique E Catapano Université Grenoble Alpes, 2022 | | 2022 |
| Modeling of 1D confinement in FD-SOI trigate nanowires at deep cryogenic temperatures E Catapano, M Cassé, F Gaillard, T Meunier, M Vinet, G Ghibaudo Solid-State Electronics 198, 108466, 2022 | | 2022 |
| Physical and technological challenges towards silicon-based quantum computing A Aprà, R Ezzouch, B Bertrand, N Rambal, E Catapano, H Niebojcwski, ... 2021 Silicon Nanoelectronics Workshop (SNW), 1-2, 2021 | | 2021 |
| Dispersive vs charge-sensing readout for linear quantum registers A Aprà, A Crippa, MLV Tagliaferri, J Li, R Ezzouch, B Bertrand, L Hutin, ... 2020 IEEE International Electron Devices Meeting (IEDM), 38.4. 1-38.4. 4, 2020 | | 2020 |
