Yu Wang(汪玉)
Yu Wang(汪玉)
Prof. at Department of Electronic Engineering, Tsinghua University, China
Verified email at mail.tsinghua.edu.cn - Homepage
TitleCited byYear
Going deeper with embedded fpga platform for convolutional neural network
J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ...
Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016
5472016
PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory
P Chi, S Li, C Xu, T Zhang, J Zhao, Y Liu, Y Wang, Y Xie
ACM SIGARCH Computer Architecture News 44 (3), 27-39, 2016
4762016
ESE: Efficient Speech Recognition Engine with Sparse LSTM on FPGA
S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ...
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
2412017
Deep gradient compression: Reducing the communication bandwidth for distributed training
Y Lin, S Han, H Mao, Y Wang, WJ Dally
arXiv preprint arXiv:1712.01887, 2017
1842017
Fpmr: Mapreduce framework on fpga
Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang
Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010
1692010
Enabling FPGAs in the cloud
F Chen, Y Shan, Y Zhang, Y Wang, H Franke, X Chang, K Wang
Proceedings of the 11th ACM Conference on Computing Frontiers, 3, 2014
1092014
Temperature-aware NBTI modeling and the impact of input vector control on performance degradation
Y Wang, H Luo, K He, R Luo, H Yang, Y Xie
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE'07, 1-6, 2007
1012007
Coordinated static and dynamic cache bypassing for GPUs
X Xie, Y Liang, Y Wang, G Sun, T Wang
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
982015
Scaling-up resistive synaptic arrays for neuro-inspired architecture: Challenges and prospect
S Yu, PY Chen, Y Cao, L Xia, Y Wang, H Wu
2015 IEEE International Electron Devices Meeting (IEDM), 17.3. 1-17.3. 4, 2015
972015
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication
L Xia, P Gu, B Li, T Tang, X Yin, W Huangfu, S Yu, Y Cao, Y Wang, ...
Journal of Computer Science and Technology 31 (1), 3-19, 2016
892016
Technological Exploration of RRAM Crossbar Array For Matrix-Vector Multiplication
Peng Gu, Boxun Li, Tianqi Tang, Shimeng Yu, Yu Cao, Yu Wang, Huazhong Yang
Design Automation Conference (ASP-DAC), 2015 20th Asia and South Pacific …, 2015
89*2015
Angel-Eye: A Complete Design Flow for Mapping CNN onto Embedded FPGA
K Guo, L Sui, J Qiu, J Yu, J Wang, S Yao, S Han, Y Wang, H Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
862018
Training Itself: Mixed-signal Training Acceleration for Memristor-based Neural Network
B Li, Y Wang, Y Wang, Y Chen, H Yang
Design Automation Conference (ASP-DAC), 2014 19th Asia and South Pacific …, 2014
802014
On the efficacy of input Vector Control to mitigate NBTI effects and leakage power
Y Wang, X Chen, W Wang, V Balakrishnan, Y Cao, Y Xie, H Yang
2009 10th International Symposium on Quality Electronic Design, 19-26, 2009
802009
Real-Time High-Quality Stereo Vision System in FPGA
FHH Wenqiang Wang, Jing Yan, Ningyi Xu, Yu Wang
Circuits and Systems for Video Technology, IEEE Transactions on 25 (10 …, 2015
78*2015
Real-time high-quality stereo vision system in FPGA
W Wang, J Yan, N Xu, Y Wang, FH Hsu
Field-Programmable Technology (FPT), 2013 International Conference on, 358-361, 2013
782013
RENO: A high-efficient reconfigurable neuromorphic computing accelerator design
X Liu, M Mao, B Liu, H Li, Y Chen, B Li, Y Wang, H Jiang, M Barnell, Q Wu, ...
2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015
752015
Three-dimensional integrated circuits (3D IC) floorplan and power/ground network co-synthesis
P Falkenstern, Y Xie, YW Chang, Y Wang
Proceedings of the 2010 Asia and South Pacific Design Automation Conference …, 2010
742010
Binary convolutional neural network on RRAM
T Tang, L Xia, B Li, Y Wang, H Yang
2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 782-787, 2017
712017
4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination …
Y Liu, Z Wang, A Lee, F Su, CP Lo, Z Yuan, CC Lin, Q Wei, Y Wang, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 84-86, 2016
702016
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