| Impact of Sub-µm Wafer Thinning on Latch-up Risk in STCO Scaling Era K Serbulova, SH Chen, G Hellings, G Hiblot, A Veloso, A Jourdain, ... 2021 43rd Annual EOS/ESD Symposium (EOS/ESD) 43, 1-6, 2021 | 4 | 2021 |
| ESD Protection Diodes in Sub-5nm Gate-All-Around Nanosheet Technologies SH Chen, A Veloso, H Mertens, G Hellings, M Simicic, WC Chen, WM Wu, ... 2020 42nd Annual EOS/ESD Symposium (EOS/ESD), 1-8, 2020 | 3 | 2020 |
| TCAD study of latch-up sensitivity to wafer thinning below 500 nm G Hiblot, K Serbulova, G Hellings, SH Chen 2021 International Semiconductor Conference (CAS), 121-124, 2021 | 2 | 2021 |
| Backside Power Delivery: Game Changer and Key Enabler of Advanced Logic Scaling and New STCO Opportunities A Veloso, B Vermeersch, R Chen, P Matagne, MG Bardon, G Eneman, ... 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | 1 | 2023 |
| Enabling Active Backside Technology for ESD and LU Reliability in DTCO/STCO K Serbulova, SH Chen, G Hellings, A Veloso, A Jourdain, D Linten, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 1 | 2022 |
| Simulation of the Sample Overheat for the Four Point Semiconductor Resistivity Measurement K Serbulova, Y Vountesmery 2019 IEEE 39th International Conference on Electronics and Nanotechnology …, 2019 | 1 | 2019 |
| Impact of Sub-m Wafer Thinning on Latch-Up Risk in DTCO/STCO Scaling Era K Serbulova, SH Chen, G Hellings, A Veloso, A Jourdain, J De Boeck, ... IEEE Transactions on Electron Devices, 2024 | | 2024 |
| ESD Challenges in 300nm Si Substrate of DTCO/STCO Scaling Options WC Chen, SH Chen, A Veloso, K Serbulova, G Hellings, G Groeseneken 2023 International Electron Devices Meeting (IEDM), 1-4, 2023 | | 2023 |
| Impact of Backside Power Delivery Network with Buried Power Rails on Latch-up Immunity in DTCO/STCO K Serbulova, SH Chen, G Hellings, A Veloso, A Jourdain, J De Boeck, ... 2023 45th Annual EOS/ESD Symposium (EOS/ESD), 1-6, 2023 | | 2023 |
| Upcoming Challenges of ESD Reliability in DTCO with BS-PDN Routing via BPRs WC Chen, SH Chen, A Veloso, K Serbulova, G Hellings, G Groeseneken 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | | 2023 |
| Evaluating latchup (LU) risk in advanced CMOS technologies K Serbulova, G Groeseneken, SH Chen, G Hellings | | 2020 |
