Yuze Chi
Title
Cited by
Cited by
Year
FPGP: Graph Processing Framework on FPGA
G Dai, Y Chi, Y Wang, H Yang
Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016
972016
ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture
G Dai, T Huang, Y Chi, N Xu, Y Wang, H Yang
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
952017
GraphH: A Processing-in-Memory Architecture for Large-scale Graph Processing
G Dai, T Huang, Y Chi, J Zhao, G Sun, Y Liu, Y Wang, Y Xie, H Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019
822019
NXgraph: an efficient graph processing system on a single machine
Y Chi, G Dai, Y Wang, G Sun, G Li, H Yang
IEEE 32nd International Conference on Data Engineering (ICDE), 409-420, 2016
692016
SODA: Stencil with Optimized Dataflow Architecture
Y Chi, J Cong, P Wei, P Zhou
Proceedings of the International Conference on Computer-Aided Design, 2018
432018
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing
YH Lai, Y Chi, Y Hu, J Wang, CH Yu, Y Zhou, J Cong, Z Zhang
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
39*2019
Test–Retest Reliability of Graph Metrics in High‐resolution Functional Connectomics: A Resting‐State Functional MRI Study
HX Du, XH Liao, QX Lin, GS Li, YZ Chi, X Liu, HZ Yang, Y Wang, MR Xia
CNS Neuroscience & Therapeutics 10 (21), 802-816, 2015
292015
HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration
J Li, Y Chi, J Cong
Proceedings of the 2020 ACM/SIGDA International Symposium on Field …, 2020
172020
HBM Connect: High-Performance HLS Interconnect for FPGA HBM
Y Choi, Y Chi, W Qiao, N Samardzic, J Cong
Proceedings of the 2021 ACM/SIGDA International Symposium on Field …, 0
9*
Rapid Cycle-Accurate Simulator for High-Level Synthesis
Y Chi, Y Choi, J Cong, J Wang
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
82019
Extending High-Level Synthesis for Task-Parallel Programs
Y Chi, J Lau, L Guo, Y Choi, J Wang, J Cong
The 29th IEEE International Symposium On Field-Programmable Custom Computing …, 2021
72021
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
Y Choi, Y Chi, J Wang, L Guo, J Cong
arXiv preprint arXiv:2010.06075, 2020
72020
AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs
L Guo, Y Chi, J Wang, J Lau, W Qiao, E Ustun, Z Zhang, J Cong
Proceedings of the 2021 ACM/SIGDA International Symposium on Field …, 2021
62021
Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency
L Guo, J Lau, Y Chi, J Wang, CH Yu, Z Chen, Z Zhang, J Cong
Proceedings of the 57th Annual Design Automation Conference 2020, 2020
62020
FLASH: Fast, Parallel, and Accurate Simulator for HLS
YK Choi, Y Chi, J Wang, J Cong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
62020
Exploiting Computation Reuse for Stencil Accelerators
Y Chi, J Cong
Proceedings of the 57th Annual Design Automation Conference 2020, 2020
22020
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication
L Song, Y Chi, A Sohrabizadeh, Y Choi, J Lau, J Cong
arXiv preprint arXiv:2109.11081, 2021
12021
An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism
Y Chi, P Zhou, J Cong
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
12018
Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication
L Song, Y Chi, L Guo, J Cong
arXiv preprint arXiv:2111.12555, 2021
2021
SPA-GCN: Efficient and Flexible GCN Accelerator with an Application for Graph Similarity Computation
A Sohrabizadeh, Y Chi, J Cong
arXiv preprint arXiv:2111.05936, 2021
2021
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