Krste Asanovic

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引用	29313	12850
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i10 指数	194	135

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David PattersonProfessor of Computer Science, UC Berkeley在 cs.berkeley.edu 的电子邮件经过验证
Andrew WatermanUC Berkeley在 eecs.berkeley.edu 的电子邮件经过验证
Yunsup LeeSiFive在 sifive.com 的电子邮件经过验证
John WAWRZYNEKProfessor of EECS, University of California, Berkeley在 berkeley.edu 的电子邮件经过验证
Borivoje NikolicUniversity of California Berkeley在 berkeley.edu 的电子邮件经过验证
John KubiatowiczUniversity of California at Berkeley在 cs.berkeley.edu 的电子邮件经过验证
Christopher BattenCornell University在 cornell.edu 的电子邮件经过验证
Jonathan Bachrachadjunct assistant professor of computer science, uc berkeley university在 eecs.berkeley.edu 的电子邮件经过验证
Vladimir StojanovicProfessor of Electrical Engineering and Computer Sciences, University of California在 berkeley.edu 的电子邮件经过验证
Nelson MorganICSI在 icsi.berkeley.edu 的电子邮件经过验证
Scott BeamerUC Santa Cruz在 ucsc.edu 的电子邮件经过验证
Henry CookGraduate Student, EECS Department, University of California Berkeley在 eecs.berkeley.edu 的电子邮件经过验证
James W DEMMELProfessor of EECS and Mathematics, UC Berkeley在 berkeley.edu 的电子邮件经过验证
Katherine YelickVice Chancellor for Research and EECS Professor, UC Berkeley and Sr. Faculty Scientist, LBNL在 lbl.gov 的电子邮件经过验证
Brian ZimmerSenior Research Scientist, NVIDIA在 nvidia.com 的电子邮件经过验证
Emmett WitchelProfessor of Computer Science, The University of Texas at Austin在 cs.utexas.edu 的电子邮件经过验证
Martin MaasGoogle DeepMind在 google.com 的电子邮件经过验证
Christos KozyrakisStanford University在 stanford.edu 的电子邮件经过验证
John ShalfDepartment Head for Computer Science, Lawrence Berkeley National Laboratory在 lbl.gov 的电子邮件经过验证
Jeffrey A. BilmesProfessor of Electrical & Computer Engineering & Computer Science, University of Washington Seattle在 uw.edu 的电子邮件经过验证

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Krste Asanovic

UC Berkeley

在 berkeley.edu 的电子邮件经过验证 - 首页

Computer Architecture VLSI Design Parallel Programming


标题按引用次数排序按年份排序按标题排序	引用次数引用次数	年份
The landscape of parallel computing research: A view from berkeley K Asanovic, R Bodik, B Catanzaro, J Gebis, P Husbands, K Keutzer, ...	3177	2006
Single-chip microprocessor that communicates directly using light C Sun, MT Wade, Y Lee, JS Orcutt, L Alloatti, MS Georgas, AS Waterman, ... Nature 528 (7583), 534-538, 2015	1401	2015
Chisel: constructing hardware in a scala embedded language J Bachrach, H Vo, B Richards, Y Lee, A Waterman, R Avižienis, ... Proceedings of the 49th Annual Design Automation Conference, 1216-1225, 2012	1305	2012
The Rocket Chip Generator K Asanovi, R Avizienis, J Bachrach, S Beamer, D Biancolin, C Celio, ... Technical Report No. UCB/EECS-2016-17, 2016	985*	2016
A view of the parallel computing landscape K Asanovic, R Bodik, J Demmel, T Keaveny, K Keutzer, J Kubiatowicz, ... Communications of the ACM 52 (10), 56-67, 2009	973	2009
Optimizing matrix multiply using PHiPAC: a portable, high-performance, ANSI C coding methodology J Bilmes, K Asanovic, CW Chin, J Demmel ACM International Conference on Supercomputing 25th Anniversary Volume, 253-260, 1997	795	1997
Directionoptimizing breadthfirst search S Beamer, K Asanović, D Patterson Scientific Programming 21 (3-4), 137-148, 2013	783	2013
Unbounded transactional memory CS Ananian, K Asanovic, BC Kuszmaul, CE Leiserson, S Lie 11th International Symposium on High-Performance Computer Architecture, 316-327, 2005	756	2005
Energy-aware lossless data compression KC Barr, K Asanović ACM Transactions on Computer Systems (TOCS) 24 (3), 250-291, 2006	706	2006
Keystone: An open framework for architecting trusted execution environments D Lee, D Kohlbrenner, S Shinde, K Asanović, D Song Proceedings of the Fifteenth European Conference on Computer Systems, 1-16, 2020	628*	2020
The RISC-V Instruction Set Manual, Volume I: User-Level ISA, Version 2.1 A Waterman, Y Lee, DA Patterson, K Asanović	625	2016
Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics C Batten, A Joshi, J Orcutt, A Khilo, B Moss, CW Holzwarth, MA Popovic, ... IEEE Micro 29 (4), 8-21, 2009	584	2009
The GAP benchmark suite S Beamer, K Asanović, D Patterson arXiv preprint arXiv:1508.03619, 2015	538	2015
The RISC-V instruction set manual: User-level ISA version 2.0 A Waterman, Y Lee, DA Patterson, K Asanovic Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, Berkeley, CA …, 2014	510*	2014
Victim replication: Maximizing capacity while hiding wire delay in tiled chip multiprocessors M Zhang, K Asanovic 32nd International Symposium on Computer Architecture (ISCA'05), 336-345, 2005	507	2005
Mondrian memory protection E Witchel, J Cates, K Asanovic Proceedings of the 10th Int’l Conference on Architectural Support for …, 2002	464	2002
Reducing power density through activity migration S Heo, K Barr, K Asanović Proceedings of the 2003 international symposium on Low power electronics and …, 2003	450	2003
Silicon-photonic clos networks for global on-chip communication A Joshi, C Batten, YJ Kwon, S Beamer, I Shamim, K Asanovic, ... 2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 124-133, 2009	446	2009
Instruction sets should be free: The case for risc-v K Asanović, DA Patterson EECS Department, University of California, Berkeley, Tech. Rep. UCB/EECS …, 2014	370*	2014
FireSim: FPGA-accelerated cycle-exact scale-out system simulation in the public cloud S Karandikar, H Mao, D Kim, D Biancolin, A Amid, D Lee, N Pemberton, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018	334	2018

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