| GCN-RL circuit designer: Transferable transistor sizing with graph neural networks and reinforcement learning H Wang, K Wang, J Yang, L Shen, N Sun, HS Lee, S Han 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 214 | 2020 |
| An energy-efficient comparator with dynamic floating inverter amplifier X Tang, L Shen, B Kasap, X Yang, W Shi, A Mukherjee, DZ Pan, N Sun IEEE Journal of Solid-State Circuits 55 (4), 1011-1022, 2020 | 166 | 2020 |
| Palm NMR and 1-chip NMR N Sun, TJ Yoon, H Lee, W Andress, R Weissleder, D Ham IEEE Journal of Solid-State Circuits 46 (1), 342-352, 2010 | 149 | 2010 |
| CMOS RF biosensor utilizing nuclear magnetic resonance N Sun, Y Liu, H Lee, R Weissleder, D Ham IEEE Journal of Solid-State Circuits 44 (5), 1629-1643, 2009 | 132 | 2009 |
| Scalable NMR spectroscopy with semiconductor chips D Ha, J Paulsen, N Sun, YQ Song, D Ham Proceedings of the National Academy of Sciences 111 (33), 11955-11960, 2014 | 120 | 2014 |
| SAR ADC architecture with 98% reduction in switching energy over conventional scheme A Sanyal, N Sun Electronics Letters 49 (4), 248-250, 2013 | 117 | 2013 |
| 15.2 A 2.75-to-75.9 TOPS/W computing-in-memory NN processor supporting set-associate block-wise zero skipping and ping-pong CIM with simultaneous computation and weight updating J Yue, X Feng, Y He, Y Huang, Y Wang, Z Yuan, M Zhan, J Liu, JW Su, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 238-240, 2021 | 112 | 2021 |
| A 13-ENOB second-order noise-shaping SAR ADC realizing optimized NTF zeros using the error-feedback structure S Li, B Qiao, M Gandara, DZ Pan, N Sun IEEE Journal of Solid-State Circuits 53 (12), 3484-3496, 2018 | 107 | 2018 |
| A 12b-ENOB 61µW noise-shaping SAR ADC with a passive integrator W Guo, N Sun ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 405-408, 2016 | 103 | 2016 |
| Modular and reconfigurable wireless e‐tattoos for personalized sensing H Jeong, L Wang, T Ha, R Mitbander, X Yang, Z Dai, S Qiao, L Shen, ... Advanced Materials Technologies 4 (8), 1900117, 2019 | 98 | 2019 |
| A 0.7-V 0.6- 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction L Chen, X Tang, A Sanyal, Y Yoon, J Cong, N Sun IEEE Journal of Solid-State Circuits 52 (5), 1388-1398, 2017 | 97 | 2017 |
| A 1-V 0.25- Inverter Stacking Amplifier With 1.07 Noise Efficiency Factor L Shen, N Lu, N Sun IEEE Journal of Solid-State Circuits 53 (3), 896-905, 2018 | 94 | 2018 |
| A second-order noise-shaping SAR ADC with passive integrator and tri-level voting H Zhuang, W Guo, J Liu, H Tang, Z Zhu, L Chen, N Sun IEEE Journal of Solid-State Circuits 54 (6), 1636-1647, 2019 | 93 | 2019 |
| A 24-µW 11-bit 1-MS/s SAR ADC with a bidirectional single-side switching technique L Chen, A Sanyal, J Ma, N Sun ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 219-222, 2014 | 89 | 2014 |
| A Scaling-Friendly Low-Power Small-Area ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability K Lee, Y Yoon, N Sun IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (4 …, 2015 | 85 | 2015 |
| A 90-dB-SNDR calibration-free fully passive noise-shaping SAR ADC with 4× passive gain and second-order DAC mismatch error shaping J Liu, X Wang, Z Gao, M Zhan, X Tang, CK Hsu, N Sun IEEE Journal of Solid-State Circuits 56 (11), 3412-3423, 2021 | 83* | 2021 |
| Strong subthreshold current array PUF with 265challenge-response pairs resilient to machine learning attacks in 130nm CMOS X Xi, H Zhuang, N Sun, M Orshansky 2017 Symposium on VLSI Circuits, C268-C269, 2017 | 83 | 2017 |
| A 174.3-dB FoM VCO-Based CT Modulator With a Fully-Digital Phase Extended Quantizer and Tri-Level Resistor DAC in 130-nm CMOS S Li, A Mukherjee, N Sun IEEE Journal of Solid-State Circuits 52 (7), 1940-1952, 2017 | 79 | 2017 |
| On the self-generation of electrical soliton pulses DS Ricketts, X Li, N Sun, K Woo, D Ham IEEE journal of solid-state circuits 42 (8), 1657-1668, 2007 | 76 | 2007 |
| Wellgan: Generative-adversarial-network-guided well generation for analog/mixed-signal circuit layout B Xu, Y Lin, X Tang, S Li, L Shen, N Sun, DZ Pan Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 71 | 2019 |
Xiyuan TangPeking University在 pku.edu.cn 的電子郵件地址已通過驗證
