| : Cost Based Hardware Optimization for Asymmetric Multicore Processors JKV Sreelatha, S Balachandran, R Nasre IEEE Transactions on Multi-Scale Computing Systems 4 (2), 163-176, 2018 | 12 | 2018 |
| Device context-based user interface AS Edwin, C Raj, RK Agrawal, S PanneerSelvam, JK VS US Patent 10,715,611, 2020 | 7 | 2020 |
| Optimizing graph algorithms in asymmetric multicore processors JVS Krishna, R Nasre IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 7 | 2018 |
| Compiler Enhanced Scheduling for OpenMP for Heterogeneous Multiprocessors JK VS, S Balachandran | 3* | 2016 |
| Optimizing Halide for Digital Signal Processors JA Stratton, JKV Sreelatha, R Ravindran, SS Dake, J Palanisamy 2020 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2020 | 2 | 2020 |
| Kernel Fusion in OpenCL JA Stratton, J Krishna VS, J Palanisamy, K Chinnaraju European Conference on Parallel Processing, 191-202, 2021 | | 2021 |
| Identifying Use-After-Free Variables in Fire-and-Forget Tasks JK VS, V Litvinov 2017 IEEE International Parallel and Distributed Processing Symposium …, 2017 | | 2017 |
Shankar BalachandranAssociate Professor, Computer Science and Engineering, Indian Institute of Technology MadrasVerified email at cse.iitm.ac.in
