Follow
Pelopidas Tsoumanis
Pelopidas Tsoumanis
PostDoc Researcher, Department of Electrical & Computer Engineering, University of Thessaly
Verified email at e-ce.uth.gr
Title
Cited by
Cited by
Year
A placement-aware soft error rate estimation of combinational circuits for multiple transient faults in CMOS technology
GI Paliaroutis, P Tsoumanis, N Evmorfopoulos, G Dimitriou, GI Stamoulis
2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2018
152018
A layout-based soft error rate estimation and mitigation in the presence of multiple transient faults in combinational logic
C Georgakidis, GI Paliaroutis, N Sketopoulos, P Tsoumanis, C Sotiriou, ...
2020 21st International Symposium on Quality Electronic Design (ISQED), 231-236, 2020
132020
Set pulse characterization and ser estimation in combinational logic with placement and multiple transient faults considerations
GI Paliaroutis, P Tsoumanis, N Evmorfopoulos, G Dimitriou, GI Stamoulis
Technologies 8 (1), 5, 2020
92020
Analysis of the impact of electrical and timing masking on soft error rate estimation in vlsi circuits
P Tsoumanis, GI Paliaroutis, N Evmorfopoulos, G Stamoulis
Technologies 10 (1), 23, 2022
62022
Placement-based SER estimation in the presence of multiple faults in combinational logic
GI Paliaroutis, P Tsoumanis, N Evmorfopoulos, G Dimitriou, GI Stamoulis
2017 27th International Symposium on Power and Timing Modeling, Optimization …, 2017
62017
SER analysis of multiple transient faults in combinational logic
GI Paliaroutis, P Tsoumanis, G Dimitriou, GI Stamoulis
Proceedings of the SouthEast European Design Automation, Computer …, 2016
52016
Multiple transient faults in combinational logic with placement considerations
GI Paliaroutis, P Tsoumanis, N Evmorfopoulos, G Dimitriou, GI Stamoulis
2019 8th International Conference on Modern Circuits and Systems …, 2019
42019
On the impact of electrical masking and timing analysis on soft error rate estimation in deep submicron technologies
P Tsoumanis, GI Paliaroutis, N Evmorfopoulos, G Stamoulis
2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2021
22021
Accurate Soft Error Rate Evaluation Using Event-Driven Dynamic Timing Analysis
GI Paliaroutis, P Tsoumanis, D Garyfallou, A Vagenas, N Evmorfopoulos, ...
2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2023
2023
Μοντέλα και αλγόριθμοι προσομοίωσης μηχανισμών πρόκλησης μεταβατικών σφαλμάτων σε ολοκληρωμένα κυκλώματα
ΠΣ Τσουμάνης
2021
Placement-based SER estimation in the presence of multiple faults in combinational logic
G Ioannis Paliaroutis, P Tsoumanis, N Evmorfopoulos, G Dimitriou, ...
2017
SER Analysis for Multiple Affected Gates
GI Paliaroutis, P Tsoumanis, G Dimitriou, GI Stamoulis
The system can't perform the operation now. Try again later.
Articles 1–12