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Nidhi Agrawal
Nidhi Agrawal
Principal Engineer - Western Digital
Verified email at wdc.com
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Cited by
Year
Sub-kT/q Switching in Strong Inversion in PbZr0.52Ti0.48O3 Gated Negative Capacitance FETs
S Dasgupta, A Rajashekhar, K Majumdar, N Agrawal, A Razavieh, ...
Exploratory Solid-State Computational Devices and Circuits, IEEE Journal on …, 2015
1422015
Toward system on chip (SoC) development using FinFET technology: Challenges, solutions, process co-development & optimization guidelines
M Shrivastava, R Mehta, S Gupta, N Agrawal, MS Baghini, DK Sharma, ...
IEEE Transactions on Electron Devices 58 (6), 1597-1607, 2011
522011
Impact of transistor architecture (bulk planar, trigate on bulk, ultrathin-body planar SOI) and material (silicon or III–V semiconductor) on variation for logic and SRAM …
N Agrawal, Y Kimura, R Arghavani, S Datta
IEEE transactions on electron devices 60 (10), 3298-3304, 2013
462013
Electron Transport in Multigate InxGa1–x As Nanowire FETs: From Diffusive to Ballistic Regimes at Room Temperature
AV Thathachary, N Agrawal, L Liu, S Datta
Nano letters 14 (2), 626-633, 2014
392014
Impact of variation in nanoscale silicon and non-silicon FinFETs and tunnel FETs on device and SRAM performance
N Agrawal, H Liu, R Arghavani, V Narayanan, S Datta
IEEE Transactions on Electron Devices 62 (6), 1691-1697, 2015
352015
Exploration of vertical MOSFET and tunnel FET device architecture for Sub 10nm node applications
H Liu, DK Mohata, A Nidhi, V Saripalli, V Narayanan, S Datta
Device Research Conference (DRC), 2012 70th Annual, 233-234, 2012
292012
Punch-through stop doping profile control via interstitial trapping by oxygen-insertion silicon channel
H Takeuchi, RJ Mears, RJ Stephenson, M Hytha, D Connelly, P Fastenko, ...
IEEE Journal of the Electron Devices Society 6, 481-486, 2017
222017
Impact of Varying Indium(x) Concentration and Quantum Confinement on PBTI Reliability in InxGa1-xAs FinFET
N Agrawal, AV Thathachary, S Mahapatra, S Datta
IEEE Electron Device Letters 36 (2), 120-122, 2014
172014
Indium arsenide (InAs) single and dual quantum-well heterostructure FinFETs
AV Thathachary, N Agrawal, KK Bhuwalka, M Cantoro, YC Heo, ...
2015 Symposium on VLSI Technology (VLSI Technology), T208-T209, 2015
162015
Analysis of local interconnect resistance at scaled process nodes
R Pandey, N Agrawal, R Arghavani, S Datta
2015 73rd Annual Device Research Conference (DRC), 184-184, 2015
132015
Investigation of InxGa1−xAs FinFET architecture with varying indium (x) concentration and quantum confinement
VT Arun, N Agrawal, G Lavallee, M Cantoro, SS Kim, DW Kim, S Datta
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014
112014
Will strong quantum confinement effect limit low VCC logic application of III–V FINFETs?
A Nidhi, V Saripalli, V Narayanan, Y Kimura, R Arghavani, S Datta
Device Research Conference (DRC), 2012 70th Annual, 231-232, 2012
92012
Punch-through stop doping profile control via interstitial trapping by oxygen-insertion silicon channel
RJ Mears, H Takeuchi, RJ Stephenson, M Hytha, R Burton, NW Cody, ...
2017 IEEE Electron Devices Technology and Manufacturing Conference (EDTM), 65-66, 2017
72017
Tunnel junction abruptness, source random dopant fluctuation and PBTI induced variability analysis of GaAs0. 4Sb0. 6/In0. 65Ga0. 35As heterojunction tunnel FETs
R Pandey, N Agrawal, V Chobpattana, K Henry, M Kuhn, H Liu, M Labella, ...
2015 IEEE International Electron Devices Meeting (IEDM), 14.2. 1-14.2. 4, 2015
72015
(Keynote) III-V Compound Semiconductor Field Effect Transistors for Low Power Digital Logic
S Datta, AV Thathachary, L Liu, E Hwang, A Agrawal, N Agrawal
ECS Transactions 53 (3), 3, 2013
42013
Reduction of charge transfer region using graphene nano-ribbon geometry for improved complementary FET performance at sub-micron channel length
MJ Hollander, N Shukla, N Agrawal, H Madan, JA Robinson, S Datta
71st Device Research Conference, 151-152, 2013
32013
2015 Index IEEE Electron Device Letters Vol. 36
M Abiko, E Acuna, R Agaiby, AK Agarwal, R Agarwal, Y Agata, A Agboton, ...
IEEE Electron Device Letters 36 (12), 1391, 2015
2015
Variation Study on Advanced Cmos Systems for Low Voltage Applications
N Agrawal
https://etda.libraries.psu.edu/catalog/26674, 2015
2015
Electron trapping dominance in strained germanium quantum well planar and FinFET devices with NBTI
N Agrawal, A Agrawal, S Mukhopadhyay, S Mahapatra, S Datta
2015 73rd Annual Device Research Conference (DRC), 283-284, 2015
2015
Transistor Modeling
J Guo, H Liu, DK Mohata, A Nidhi, V Saripalli, V Narayanan, S Datta
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