Follow
Brian Zimmer
Brian Zimmer
Senior Research Scientist, NVIDIA
Verified email at nvidia.com
Title
Cited by
Cited by
Year
Simba: Scaling deep-learning inference with multi-chip-module-based architecture
YS Shao, J Clemons, R Venkatesan, B Zimmer, M Fojtik, N Jiang, B Keller, ...
Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019
3482019
An agile approach to building RISC-V microprocessors
Y Lee, A Waterman, H Cook, B Zimmer, B Keller, A Puggelli, J Kwak, ...
ieee Micro 36 (2), 8-20, 2016
1482016
Magnet: A modular accelerator generator for neural networks
R Venkatesan, YS Shao, M Wang, J Clemons, S Dai, M Fojtik, B Keller, ...
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
1122019
SRAM assist techniques for operation in a wide voltage range in 28-nm CMOS
B Zimmer, SO Toh, H Vo, Y Lee, O Thomas, K Asanovic, B Nikolic
IEEE Transactions on Circuits and Systems II: Express Briefs 59 (12), 853-857, 2012
942012
A 0.32–128 TOPS, scalable multi-chip-module-based deep neural network inference accelerator with ground-referenced signaling in 16 nm
B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
IEEE Journal of Solid-State Circuits 55 (4), 920-932, 2020
862020
A RISC-V vector processor with simultaneous-switching switched-capacitor DC–DC converters in 28 nm FDSOI
B Zimmer, Y Lee, A Puggelli, J Kwak, R Jevtić, B Keller, S Bailey, ...
IEEE Journal of Solid-State Circuits 51 (4), 930-942, 2016
782016
A modular digital VLSI flow for high-productivity SoC design
B Khailany, E Khmer, R Venkatesan, J Clemons, JS Emer, M Fojtik, ...
Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018
732018
Analog/mixed-signal hardware error modeling for deep learning inference
AS Rekhi, B Zimmer, N Nedovic, N Liu, R Venkatesan, M Wang, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
672019
System and method for performing SRAM write assist
BM Zimmer, ME Sinangil
US Patent 8,861,290, 2014
652014
A 1.17-pJ/b, 25-Gb/s/pin ground-referenced single-ended serial link for off-and on-package communication using a process-and temperature-adaptive voltage regulator
JW Poulton, JM Wilson, WJ Turner, B Zimmer, X Chen, SS Kudva, S Song, ...
IEEE Journal of Solid-State Circuits 54 (1), 43-54, 2018
622018
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI
B Zimmer, Y Lee, A Puggelli, J Kwak, R Jevtic, B Keller, S Bailey, ...
2015 Symposium on VLSI Circuits (VLSI Circuits), C316-C317, 2015
532015
A RISC-V processor SoC with integrated power management at submicrosecond timescales in 28 nm FD-SOI
B Keller, M Cochet, B Zimmer, J Kwak, A Puggelli, Y Lee, M Blagojević, ...
IEEE Journal of Solid-State Circuits 52 (7), 1863-1875, 2017
522017
A 0.11 pj/op, 0.32-128 tops, scalable multi-chip-module-based deep neural network accelerator with ground-reference signaling in 16nm
B Zimmer, R Venkatesan, YS Shao, J Clemons, M Fojtik, N Jiang, B Keller, ...
2019 Symposium on VLSI Circuits, C300-C301, 2019
512019
Strober: Fast and accurate sample-based energy simulation for arbitrary RTL
D Kim, A Izraelevitz, C Celio, H Kim, B Zimmer, Y Lee, J Bachrach, ...
ACM SIGARCH Computer Architecture News 44 (3), 128-139, 2016
472016
A 28 nm 2 Mbit 6 T SRAM with highly configurable low-voltage write-ability assist implementation and capacitor-based sense-amplifier input offset compensation
ME Sinangil, JW Poulton, MR Fojtik, TH Greer, SG Tell, AJ Gotterba, ...
IEEE Journal of Solid-State Circuits 51 (2), 557-567, 2015
472015
A 1.17 pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off-and on-package communication in 16nm CMOS using a process-and temperature-adaptive voltage regulator
JM Wilson, WJ Turner, JW Poulton, B Zimmer, X Chen, SS Kudva, S Song, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 276-278, 2018
432018
Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects
WJ Turner, JW Poulton, JM Wilson, X Chen, SG Tell, M Fojtik, TH Greer, ...
2018 IEEE Custom Integrated Circuits Conference (CICC), 1-8, 2018
352018
Vs-quant: Per-vector scaled quantization for accurate low-precision neural network inference
S Dai, R Venkatesan, M Ren, B Zimmer, W Dally, B Khailany
Proceedings of Machine Learning and Systems 3, 873-884, 2021
342021
6T SRAM design for wide voltage range in 28nm FDSOI
O Thomas, B Zimmer, B Pelloux-Prayer, N Planes, KC Akyel, L Ciampolini, ...
2012 IEEE International SOI Conference (SOI), 1-2, 2012
262012
Optimal clipping and magnitude-aware differentiation for improved quantization-aware training
C Sakr, S Dai, R Venkatesan, B Zimmer, W Dally, B Khailany
International Conference on Machine Learning, 19123-19138, 2022
232022
The system can't perform the operation now. Try again later.
Articles 1–20