| A light-weight compaction tree to reduce I/O amplification toward efficient key-value stores T Yao, J Wan, P Huang, X He, Q Gui, F Wu, C Xie Proc. 33rd Int. Conf. Massive Storage Syst. Technol.(MSST), 1-13, 2017 | 65 | 2017 |
| An efficient page-level FTL to optimize address translation in flash memory Y Zhou, F Wu, P Huang, X He, C Xie, J Zhou Proceedings of the Tenth European Conference on Computer Systems, 1-16, 2015 | 61 | 2015 |
| Characterizing 3D floating gate NAND flash: Observations, analyses, and implications Q Xiong, F Wu, Z Lu, Y Zhu, Y Zhou, Y Chu, C Xie, P Huang ACM Transactions on Storage (TOS) 14 (2), 1-31, 2018 | 49 | 2018 |
| Extending real-time analysis for wormhole NoCs Q Xiong, F Wu, Z Lu, C Xie IEEE Transactions on Computers 66 (9), 1532-1546, 2017 | 42 | 2017 |
| Real-time analysis for wormhole NoC: Revisited and revised Q Xiong, Z Lu, F Wu, C Xie Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 75-80, 2016 | 37 | 2016 |
| REAL: A retention error aware LDPC decoding scheme to improve NAND flash read performance M Zhang, F Wu, X He, P Huang, S Wang, C Xie 2016 32nd Symposium on Mass Storage Systems and Technologies (MSST), 1-13, 2016 | 36 | 2016 |
| Characterizing the reliability and threshold voltage shifting of 3D charge trap NAND flash W Liu, F Wu, M Zhang, Y Wang, Z Lu, X Lu, C Xie 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 312-315, 2019 | 33 | 2019 |
| Building efficient key-value stores via a lightweight compaction tree T Yao, J Wan, P Huang, X He, F Wu, C Xie ACM Transactions on Storage (TOS) 13 (4), 1-28, 2017 | 33 | 2017 |
| Characterizing 3D charge trap NAND flash: Observations, analyses and applications F Wu, Y Zhu, Q Xiong, Z Lu, Y Zhou, W Kong, C Xie 2018 IEEE 36th International Conference on Computer Design (ICCD), 381-388, 2018 | 32 | 2018 |
| Using error modes aware LDPC to improve decoding performance of 3-D TLC NAND flash F Wu, M Zhang, Y Du, W Liu, Z Lu, J Wan, Z Tan, C Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 30 | 2019 |
| Measuring and analyzing write amplification characteristics of solid state disks H Sun, X Qin, F Wu, C Xie 2013 IEEE 21st International Symposium on Modelling, Analysis and Simulation …, 2013 | 29 | 2013 |
| RBER-aware lifetime prediction scheme for 3D-TLC NAND flash memory R Ma, F Wu, M Zhang, Z Lu, J Wan, C Xie IEEE Access 7, 44696-44708, 2019 | 27 | 2019 |
| Lifetime adaptive ECC in NAND flash page management S Wang, F Wu, Z Lu, Y Zhou, Q Xiong, M Zhang, C Xie Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 25 | 2017 |
| Characterizing 3D floating gate NAND flash Q Xiong, F Wu, Z Lu, Y Zhu, Y Zhou, Y Chu, C Xie, P Huang ACM SIGMETRICS Performance Evaluation Review 45 (1), 31-32, 2017 | 24 | 2017 |
| WAS: Wear aware superblock management for prolonging SSD lifetime S Wang, F Wu, C Yang, J Zhou, C Xie, J Wan Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 22 | 2019 |
| Exploiting error characteristic to optimize read voltage for 3-D NAND flash memory M Zhang, F Wu, Q Yu, W Liu, Y Wang, C Xie IEEE Transactions on Electron Devices 67 (12), 5490-5496, 2020 | 21 | 2020 |
| OSPADA: One-shot programming aware data allocation policy to improve 3D NAND flash read performance F Wu, Z Lu, Y Zhou, X He, Z Tan, C Xie 2018 IEEE 36th International Conference on Computer Design (ICCD), 51-58, 2018 | 20 | 2018 |
| Program error rate-based wear leveling for NAND flash memory X Shi, F Wu, S Wang, C Xie, Z Lu 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018 | 20 | 2018 |
| Pair-bit errors aware LDPC decoding in MLC NAND flash memory M Zhang, F Wu, Y Du, W Liu, C Xie IEEE transactions on computer-aided design of integrated circuits and …, 2018 | 19 | 2018 |
| CooECC: A cooperative error correction scheme to reduce LDPC decoding latency in NAND flash M Zhang, F Wu, Y Du, C Yang, C Xie, J Wan 2017 IEEE International Conference on Computer Design (ICCD), 657-664, 2017 | 18 | 2017 |
Zhonghai Lu (鲁中海)Professor at KTH Royal Institute of Technology, SwedenVerified email at kth.se
