| Squeezenext: Hardware-aware neural network design A Gholami, K Kwon, B Wu, Z Tai, X Yue, P Jin, S Zhao, K Keutzer Proceedings of the IEEE conference on computer vision and pattern …, 2018 | 340 | 2018 |
| Compiling apparatus and method of a multicore device K Kwon, SJ Kim, S Mahlke, Y Park US Patent 8,813,073, 2014 | 85 | 2014 |
| Design space exploration and implementation of a high performance and low area coarse grained reconfigurable processor D Suh, K Kwon, S Kim, S Ryu, J Kim 2012 international conference on field-programmable technology, 67-70, 2012 | 52 | 2012 |
| Reconfigurable processor and method of reconfiguring the same J Park, K Kwon, S Lee US Patent 9,244,883, 2016 | 51 | 2016 |
| Co-design of deep neural nets and neural net accelerators for embedded vision applications K Kwon, A Amid, A Gholami, B Wu, K Asanovic, K Keutzer Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 41 | 2018 |
| Reconfigurable processor and operation method therefor D Suh, K Kwon, YH Park, SW Lee, SJ Kim US Patent 10,396,797, 2019 | 16 | 2019 |
| Design of high-performance 32-bit embedded processor JH Kim, DH You, KS Kwon, EJ Bae, WH Son, IC Park 2008 International SoC Design Conference 3, III-54-III-55, 2008 | 14 | 2008 |
| Pipelined cartesian-to-polar coordinate conversion based on SRT division SW Lee, KS Kwon, IC Park IEEE Transactions on Circuits and Systems II: Express Briefs 54 (8), 680-684, 2007 | 11 | 2007 |
| Multiport data cache apparatus and method of controlling the same J Park, K Kwon, SJ Kim US Patent 8,583,873, 2013 | 10 | 2013 |
| Direct memory access controller and method of operating the same K Kwon, J Park, SJ Kim US Patent 8,433,829, 2013 | 6 | 2013 |
| Co-design of deep neural nets and neural net accelerators for embedded vision applications. In 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC) K Kwon, A Amid, A Gholami, B Wu, K Asanovic, K Keutzer IEEE, 2018 | 5 | 2018 |
| Reconfigurable processor and operation method thereof K Kwon, SJ Kim US Patent App. 14/269,560, 2014 | 3 | 2014 |
| Vector processor and control method therefor K Kwon, J Park, D Suh, K Yoon US Patent 11,263,018, 2022 | 2 | 2022 |
| Weight equalizing shift scaler-coupled post-training quantization J Oh, SJ Lee, M Park, P Walagaurav, K Kwon arXiv preprint arXiv:2008.05767, 2020 | 2 | 2020 |
| Reconfigurable processor and mini-core of reconfigurable processor D Suh, SJ Kim, HS Yu, K Kwon, J Park US Patent 9,330,057, 2016 | 2 | 2016 |
| Memory controller and memory control method J Park, K Kwon, SJ Kim US Patent 9,122,565, 2015 | 2 | 2015 |
| Method and device for processing an instruction having multi-instruction data including configurably concatenating portions of an immediate operand from two of the instructions K Kwon, M Ahn, SJ Kim, YH Park US Patent 10,915,323, 2021 | 1 | 2021 |
| Direct memory access controller and system for accessing channel buffer K Kwon, SJ Kim, D Kim US Patent 10,185,676, 2019 | 1 | 2019 |
| Data processing method and device K Kwon, M Ahn, SJ Kim, YH Park US Patent App. 15/520,168, 2017 | 1 | 2017 |
| Processor with heterogeneous clustered architecture K Kwon, M Ahn, D Suh, SJ Kim US Patent App. 14/314,282, 2015 | 1 | 2015 |
