Risc-v extensions for bit manipulation instructions B Koppelmann, P Adelt, W Mueller, C Scheytt 2019 29th International Symposium on Power and Timing Modeling, Optimization …, 2019 | 25 | 2019 |
A scalable platform for qemu based fault effect analysis for risc-v hardware architectures P Adelt, B Koppelmann, W Mueller, C Scheytt MBMV 2020-Methods and Description Languages for Modelling and Verification …, 2020 | 7 | 2020 |
Hierarchical Scheduling for Plug-and-Produce J Jatzkowski, P Adelt, A Rettberg Procedia Technology 26, 227-234, 2016 | 7 | 2016 |
Register and instruction coverage analysis for different RISC-V ISA modules P Adelt, B Koppelmann, W Mueller, C Scheytt MBMV 2021; 24th Workshop, 1-8, 2021 | 6 | 2021 |
The Scale4Edge RISC-V Ecosystem W Ecker, P Adelt, W Mueller, R Heckmann, M Krstic, V Herdt, R Drechsler, ... 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 808-813, 2022 | 3 | 2022 |
Qemu support for risc-v: Current state and future releases P Adelt, B Koppelmann, W Müller, C Scheytt 2nd International Workshop on RISC-V Research Activities, 2019 | 2 | 2019 |
Fast dynamic fault injection for virtual microcontroller platforms P Adelt, B Koppelmann, W Mueller, M Becker, B Kleinjohann, C Scheytt 2016 IFIP/IEEE International Conference on Very Large Scale Integration …, 2016 | 2 | 2016 |
Analyse sicherheitskritischer Software für RISC-V Prozessoren P Adelt, B Koppelmann, W Müller, C Scheytt MBMV 2019-22. Workshop Methoden und Beschreibungssprachen zur Modellierung …, 2019 | | 2019 |
Automatisierte Fehlerinjektion zur Entwicklung sicherer Mikrocontrolleranwendungen auf der Basis virtueller Plattformen P Adelt, B Koppelmann, W Müller, B Kleinjohann, C Scheytt, ... Wissenschaftsforum Intelligente Technische Systeme (WInTeSys) 369, 2017 | | 2017 |