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Supreet Jeloka
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引用次数
引用次数
年份
Compute caches
S Aga, S Jeloka, A Subramaniyan, S Narayanasamy, D Blaauw, R Das
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
3752017
A 28 nm configurable memory (TCAM/BCAM/SRAM) using push-rule 6T bit cell enabling logic-in-memory
S Jeloka, NB Akesh, D Sylvester, D Blaauw
IEEE Journal of Solid-State Circuits 51 (4), 1009-1021, 2016
3172016
A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V
Q Dong, S Jeloka, M Saligane, Y Kim, M Kawaminami, A Harada, ...
IEEE Journal of Solid-State Circuits 53 (4), 1006-1015, 2017
942017
A 0.3 V VDDmin 4+ 2T SRAM for searching and in-memory computing using 55nm DDC technology
Q Dong, S Jeloka, M Saligane, Y Kim, M Kawaminami, A Harada, ...
2017 Symposium on VLSI Circuits, C160-C161, 2017
892017
A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell
S Jeloka, K Yang, M Orshansky, D Sylvester, D Blaauw
2017 Symposium on VLSI Circuits, C270-C271, 2017
692017
A 20-pW discontinuous switched-capacitor energy harvester for smart sensor applications
X Wu, Y Shi, S Jeloka, K Yang, I Lee, Y Lee, D Sylvester, D Blaauw
IEEE Journal of Solid-State Circuits 52 (4), 972-984, 2017
692017
Recryptor: A reconfigurable in-memory cryptographic Cortex-M0 processor for IoT
Y Zhang, L Xu, K Yang, Q Dong, S Jeloka, D Blaauw, D Sylvester
2017 Symposium on VLSI Circuits, C264-C265, 2017
422017
Storage device supporting logical operations, methods and storage medium
S Jeloka, DT Blaauw
US Patent 9,396,795, 2016
382016
A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell
S Jeloka, N Akesh, D Sylvester, D Blaauw
2015 Symposium on VLSI Circuits (VLSI Circuits), C272-C273, 2015
312015
27.2 M0N0: A performance-regulated 0.8-to-38MHz DVFS ARM cortex-M33 SIMD MCU with 10nW sleep power
P Prabhat, B Labbe, G Knight, A Savanth, J Svedas, MJ Walker, S Jeloka, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 422-424, 2020
272020
Hi-rise: A high-radix switch for 3D integration with single-cycle arbitration
S Jeloka, R Das, RG Dreslinski, T Mudge, D Blaauw
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 471-483, 2014
262014
Near-threshold computing in FinFET technologies: Opportunities for improved voltage scalability
N Pinckney, L Shifren, B Cline, S Sinha, S Jeloka, RG Dreslinski, T Mudge, ...
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
242016
Vix: Virtual input crossbar for efficient switch allocation
S Rao, S Jeloka, R Das, D Blaauw, R Dreslinski, T Mudge
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
242014
Impact of FinFET on near-threshold voltage scalability
N Pinckney, S Jeloka, R Dreslinski, T Mudge, D Sylvester, D Blaauw, ...
IEEE Design & Test 34 (2), 31-38, 2016
142016
Using low cost erasure and error correction schemes to improve reliability of commodity DRAM systems
HM Chen, S Jeloka, A Arunkumar, D Blaauw, CJ Wu, T Mudge, ...
IEEE Transactions on Computers 65 (12), 3766-3779, 2016
122016
Single cycle arbitration within an interconnect
S Jeloka, SN Abeyratne, RG Dreslinski, R Das, TN Mudge, DT Blaauw
US Patent 9,514,074, 2016
92016
Hardware resource configuration for processing system
D Sunwoo, S Jeloka, SP Sinha, J Lee, JA Joao, K Nathella
US Patent 11,966,785, 2024
62024
Co-design of thermal management with system architecture and power management for 3D ICs
R Roy, S Das, B Labbe, R Mathur, S Jeloka
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), 211-220, 2022
62022
A 66pW discontinuous switch-capacitor energy harvester for self-sustaining sensor applications
X Wu, Y Shi, S Jeloka, K Yang, I Lee, D Sylvester, D Blaauw
2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits), 1-2, 2016
62016
System technology co-optimization and design challenges for 3D IC
S Jeloka, B Cline, S Das, B Labbe, A Rico, R Herberholz, J DeLaCruz, ...
2022 IEEE Custom Integrated Circuits Conference (CICC), 1-6, 2022
42022
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