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Qiaoyan Yu
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Year
Novel dynamic state-deflection method for gate-level design obfuscation
J Dofe, Q Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
922017
Hardware security assurance in emerging IoT applications
J Dofe, J Frey, Q Yu
2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2050-2053, 2016
752016
Adaptive error control for NoC switch-to-switch links in a variable noise environment
Q Yu, P Ampadu
2008 IEEE International Symposium on Defect and Fault Tolerance of VLSI …, 2008
572008
Transient and permanent error co-management method for reliable networks-on-chip
Q Yu, P Ampadu
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 145-154, 2010
532010
A hardened network-on-chip design using runtime hardware Trojan mitigation methods
J Frey, Q Yu
Integration 56, 15-31, 2017
522017
Hardware security threats and potential countermeasures in emerging 3D ICs
J Dofe, Q Yu, H Wang, E Salman
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 69-74, 2016
492016
Exploiting error control approaches for hardware trojans on network-on-chip links
Q Yu, J Frey
2013 IEEE international symposium on defect and fault tolerance in VLSI and …, 2013
482013
Assessing CPA resistance of AES with different fault tolerance mechanisms
H Pahlevanzadeh, J Dofe, Q Yu
2016 21st Asia and South Pacific design automation conference (ASP-DAC), 661-666, 2016
472016
A comprehensive FPGA-based assessment on fault-resistant AES against correlation power analysis attack
J Dofe, H Pahlevanzadeh, Q Yu
Journal of Electronic Testing 32, 611-624, 2016
442016
Dual-layer adaptive error control for network-on-chip links
Q Yu, P Ampadu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (7 …, 2011
432011
Security threats in approximate computing systems
P Yellu, N Boskov, MA Kinsy, Q Yu
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 387-392, 2019
392019
Adaptive error control for nanometer scale network-on-chip links
Q Yu, P Ampadu
IET computers & digital techniques 3 (6), 643-659, 2009
392009
Thwarting security threats from malicious FPGA tools with novel FPGA-oriented moving target defense
Z Zhang, L Njilla, CA Kamhoua, Q Yu
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (3), 665-678, 2018
332018
Exploiting inherent information redundancy to manage transient errors in NoC routing arbitration
Q Yu, M Zhang, P Ampadu
Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on …, 2011
332011
A flexible parallel simulator for networks-on-chip with error control
Q Yu, P Ampadu
ieee transactions on computer-aided design of integrated circuits and …, 2009
332009
Exploiting state obfuscation to detect hardware trojans in NoC network interfaces
J Frey, Q Yu
2015 IEEE 58th International Midwest Symposium on Circuits and Systems …, 2015
312015
Hardware-efficient logic camouflaging for monolithic 3-D ICs
C Yan, J Dofe, S Kontak, Q Yu, E Salman
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (6), 799-803, 2017
292017
A dual-layer method for transient and permanent error co-management in noc links
Q Yu, P Ampadu
IEEE Transactions on Circuits and Systems II: Express Briefs 58 (1), 36-40, 2010
292010
Exploiting hardware obfuscation methods to prevent and detect hardware trojans
Q Yu, J Dofe, Z Zhang
2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017
262017
Transistor-level camouflaged logic locking method for monolithic 3D IC security
J Dofe, C Yan, S Kontak, E Salman, Q Yu
2016 IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), 1-6, 2016
252016
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