A study on the use of performance counters to estimate power in microprocessors R Rodrigues, A Annamalai, I Koren, S Kundu IEEE Transactions on Circuits and Systems II: Express Briefs 60 (12), 882-886, 2013 | 94 | 2013 |
Performance per watt benefits of dynamic core morphing in asymmetric multicores R Rodrigues, A Annamalai, I Koren, S Kundu, O Khan 2011 International conference on parallel architectures and compilation …, 2011 | 56 | 2011 |
An opportunistic prediction-based thread scheduling to maximize throughput/watt in AMPs A Annamalai, R Rodrigues, I Koren, S Kundu Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 54 | 2013 |
Improving performance per watt of asymmetric multi-core processors via online program phase classification and adaptive core morphing R Rodrigues, A Annamalai, I Koren, S Kundu ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1 …, 2013 | 25 | 2013 |
Scalable thread scheduling in asymmetric multicores for power efficiency R Rodrigues, A Annamalai, I Koren, S Kundu 2012 IEEE 24th international symposium on computer architecture and high …, 2012 | 24 | 2012 |
Dynamic thread scheduling in asymmetric multicores to maximize performance-per-watt A Annamalai, R Rodrigues, I Koren, S Kundu 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 22 | 2012 |
Reducing energy per instruction via dynamic resource allocation and voltage and frequency adaptation in asymmetric multicores A Annamalai, R Rodrigues, I Koren, S Kundu 2014 IEEE Computer Society Annual Symposium on VLSI, 436-441, 2014 | 11 | 2014 |
Performance and power benefits of sharing execution units between a high performance core and a low power core R Rodrigues, I Koren, S Kundu 2014 27th international conference on VLSI design and 2014 13th …, 2014 | 11 | 2014 |
Optical lithography simulation using wavelet transform R Rodrigues, A Sreedhar, S Kundu 2009 IEEE International Conference on Computer Design, 427-432, 2009 | 10 | 2009 |
A mechanism to verify cache coherence transactions in multicore systems R Rodrigues, I Koren, S Kundu 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2012 | 9 | 2012 |
On graceful degradation of chip multiprocessors in presence of faults via flexible pooling of critical execution units R Rodrigues, S Kundu 2011 IEEE 17th International On-Line Testing Symposium, 67-72, 2011 | 9 | 2011 |
Shadow checker (SC): A low-cost hardware scheme for online detection of faults in small memory structures of a microprocessor R Rodrigues, S Kundu, O Khan 2010 IEEE International Test Conference, 1-10, 2010 | 9 | 2010 |
A study on performance benefits of core morphing in an asymmetric multicore processor A Das, R Rodrigues, I Koren, S Kundu 2010 IEEE International Conference on Computer Design, 17-22, 2010 | 9 | 2010 |
An online mechanism to verify datapath execution using existing resources in chip multiprocessors R Rodrigues, S Kundu 2011 Asian Test Symposium, 161-166, 2011 | 8 | 2011 |
A study on polymorphing superscalar processor dynamically to improve power efficiency S Srinivasan, R Rodrigues, A Annamalai, I Koren, S Kundu 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 46-51, 2013 | 7 | 2013 |
An architecture to enable life cycle testing in cmps R Rodrigues, I Koren, S Kundu 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2011 | 7 | 2011 |
Optical Lithography Simulation with Focus Variation using Wavelet Transform R Rodrigues, S Kundu 2010 23rd International Conference on VLSI Design, 387-392, 2010 | 4 | 2010 |
A runtime support mechanism for fast mode switching of a self-morphing core for power efficiency S Srinivasan, N Kurella, I Koren, R Rodrigues, S Kundu Proceedings of the 23rd international conference on Parallel architectures …, 2014 | 3 | 2014 |
A low-power instruction replay mechanism for design of resilient microprocessors R Rodrigues, A Annamalai, S Kundu ACM Transactions on Embedded Computing Systems (TECS) 13 (4), 1-23, 2014 | 3 | 2014 |
A low power architecture for online detection of execution errors in smt processors R Rodrigues, S Kundu 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2013 | 3 | 2013 |