Modeling and Synthesis of Quality-Energy Optimal Approximate Adders J Miao, K He, A Gerstlauer, M Orshansky Proceedings of the International Conference on Computer-Aided Design, 728-735, 2012 | 161 | 2012 |
Approximate Logic Synthesis under General Error Magnitude and Frequency Constraints J Miao, A Gerstlauer, M Orshansky 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 779-786, 2013 | 92 | 2013 |
Multi-level Approximate Logic Synthesis under General Error Constraints J Miao, A Gerstlauer, M Orshansky 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 504-510, 2014 | 62 | 2014 |
Hotspot Detection via Attention-based Deep Layout Metric Learning H Geng, H Yang, L Zhang, J Miao, F Yang, X Zeng, B Yu | 30 | 2020 |
Cross-layer Optimization for High Speed Adders: A Pareto Driven Machine Learning Approach Y Ma, S Roy, J Miao, J Chen, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 27 | 2018 |
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization Yuzhe Ma, Wei Zhong, Shuxiang Hu, Jhih-Rong Gao, Jian Kuang, Jin Miao, Bei Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020 | 26 | 2020 |
A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization BY Yuzhe Ma, Jhih-Rong Gao, Jian Kuang, Jin Miao IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 81–88, 2017 | 26* | 2017 |
Correlated Multi-objective Multi-fidelity Optimization for HLS Directives Design Q Sun, T Chen, S Liu, J Miao, J Chen, H Yu, B Yu IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), 2021 | 24 | 2021 |
LRR-DPUF: Learning Resilient and Reliable Digital Physical Unclonable Function J Miao, M Li, S Roy, B Yu 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 21 | 2016 |
Power-Driven DNN Dataflow Optimization on FPGA Q Sun, T Chen, J Miao, B Yu 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2019 | 17 | 2019 |
SD-PUF: Spliced Digital Physical Unclonable Function J Miao, M Li, S Roy, Y Ma, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 17 | 2018 |
A Learning Bridge from Architectural Synthesis to Physical Design for Exploring Power Efficient High-Performance Adders S Roy, Y Ma, J Miao, B Yu 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 15 | 2017 |
High-speed adder design space exploration via graph neural processes H Geng, Y Ma, Q Xu, J Miao, S Roy, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 14 | 2021 |
Practical Public PUF Enabled by Solving Max-Flow Problem on Chip M Li, J Miao, K Zhong, DZ Pan 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2016 | 9 | 2016 |
Modeling and Synthesis of Approximate Digital Circuits J Miao | 4 | 2015 |