Zheng Li
Zheng Li
Wuhan National Laboratory for Optoelectronics (WNLO), Huazhong University of Science and Technology
Verified email at hust.edu.cn - Homepage
Title
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Year
CACF: A novel circuit architecture co-optimization framework for improving performance, reliability and energy of ReRAM-based main memory system
Y Zhang, D Feng, W Tong, Y Hua, J Liu, Z Tan, C Wang, B Wu, Z Li, G Xu
ACM Transactions on Architecture and Code Optimization (TACO) 15 (2), 1-26, 2018
142018
Exploiting more parallelism from write operations on PCM
Z Li, F Wang, Y Hua, W Tong, J Liu, Y Chen, D Feng
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 768-773, 2016
122016
Cross-point resistive memory: Nonideal properties and solutions
C Wang, D Feng, W Tong, J Liu, Z Li, J Chang, Y Zhang, B Wu, J Xu, ...
ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (4 …, 2019
112019
MaxPB: Accelerating PCM write by maximizing the power budget utilization
Z Li, F Wang, D Feng, Y Hua, J Liu, W Tong
ACM Transactions on Architecture and Code Optimization (TACO) 13 (4), 1-26, 2016
92016
A software-defined fusion storage system for PCM and NAND flash
Z Li, S Zhang, J Liu, W Tong, Y Hua, D Feng, C Yu
2015 IEEE Non-Volatile Memory System and Applications Symposium (NVMSA), 1-6, 2015
92015
A user-visible solid-state storage system with software-defined fusion methods for PCM and NAND flash
Z Li, F Wang, J Liu, D Feng, Y Hua, W Tong, S Zhang
Journal of Systems Architecture 71, 44-61, 2016
72016
Tetris write: Exploring more write parallelism considering PCM asymmetries
Z Li, F Wang, D Feng, Y Hua, W Tong, J Liu, X Liu
2016 45th International Conference on Parallel Processing (ICPP), 159-168, 2016
72016
基于相变存储器的存储技术研究综述
冒伟, 刘景宁, 童薇, 冯丹, 李铮, 周文, 张双武
计算机学报 38 (5), 944-960, 2015
72015
Time and space-efficient write parallelism in PCM by exploiting data patterns
Z Li, F Wang, D Feng, Y Hua, J Liu, W Tong, Y Chen, SS Harb
IEEE Transactions on Computers 66 (9), 1629-1644, 2017
62017
An efficient PCM-based main memory system via exploiting fine-grained dirtiness of cachelines
J Xu, D Feng, Y Hua, W Tong, J Liu, C Li, Z Li
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
22018
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