Yang-Kyu Choi
Yang-Kyu Choi
Professor of Electrical Engineering, KAIST
Verified email at - Homepage
Cited by
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Metallic Ti3C2Tx MXene Gas Sensors with Ultrahigh Signal-to-Noise Ratio
SJ Kim, HJ Koh, CE Ren, O Kwon, K Maleski, SY Cho, B Anasori, CK Kim, ...
ACS nano 12 (2), 986-993, 2018
Sub 50-nm finfet: Pmos
X Huang, WC Lee, C Kuo, D Hisamoto, L Chang, J Kedzierski, ...
International Electron Devices Meeting 1999. Technical Digest (Cat. No …, 1999
Chemical sensors based on nanostructured materials
XJ Huang, YK Choi
Sensors and Actuators B: Chemical 122 (2), 659-671, 2007
Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture
C Hu, TJ King, V Subramanian, L Chang, X Huang, YK Choi, ...
US Patent 6,413,802, 2002
A polydimethylsiloxane (PDMS) sponge for the selective absorption of oil from water
SJ Choi, TH Kwon, H Im, DI Moon, DJ Baek, ML Seol, JP Duarte, YK Choi
ACS applied materials & interfaces 3 (12), 4552-4556, 2011
Sub-50 nm P-channel FinFET
X Huang, WC Lee, C Kuo, D Hisamoto, L Chang, J Kedzierski, ...
IEEE Transactions on Electron Devices 48 (5), 880-886, 2001
A dielectric-modulated field-effect transistor for biosensing
H Im, XJ Huang, B Gu, YK Choi
Nature nanotechnology 2 (7), 430-434, 2007
Aspartate aminotransferase (AST/GOT) and alanine aminotransferase (ALT/GPT) detection techniques
XJ Huang, YK Choi, HS Im, O Yarimaga, E Yoon, HS Kim
Sensors 6 (7), 756-782, 2006
Sub-20 nm CMOS FinFET technologies
YK Choi, N Lindert, P Xuan, S Tang, D Ha, E Anderson, TJ King, J Bokor, ...
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
Ultra-thin body SOI MOSFET for deep-sub-tenth micron era
YK Choi, K Asano, N Lindert, V Subramanian, TJ King, J Bokor, C Hu
International Electron Devices Meeting 1999. Technical Digest (Cat. No …, 1999
A robust superhydrophobic and superoleophobic surface with inverse-trapezoidal microstructures on a large transparent flexible substrate
M Im, H Im, JH Lee, JB Yoon, YK Choi
Soft Matter 6 (7), 1401-1404, 2010
Extremely scaled silicon nano-CMOS devices
L Chang, Y Choi, D Ha, P Ranade, S Xiong, J Bokor, C Hu, TJ King
Proceedings of the IEEE 91 (11), 1860-1873, 2003
A spacer patterning technology for nanoscale CMOS
YK Choi, TJ King, C Hu
IEEE Transactions on Electron Devices 49 (3), 436-441, 2002
Superhydrophobic bionic surfaces with hierarchical microsphere/SWCNT composite arrays
Y Li, XJ Huang, SH Heo, CC Li, YK Choi, WP Cai, SO Cho
Langmuir 23 (4), 2169-2174, 2007
Nanoscale CMOS spacer FinFET for the terabit era
YK Choi, TJ King, C Hu
IEEE Electron Device Letters 23 (1), 25-27, 2002
Sensitivity of threshold voltage to nanowire width variation in junctionless transistors
SJ Choi, DI Moon, S Kim, JP Duarte, YK Choi
IEEE Electron Device Letters 32 (2), 125-127, 2010
Self-cleaning effect of highly water-repellent microshell structures for solar cell applications
YB Park, H Im, M Im, YK Choi
Journal of Materials Chemistry 21 (3), 633-636, 2011
Fabrication of sub-10-nm silicon nanowire arrays by size reduction lithography
YK Choi, J Zhu, J Grunes, J Bokor, GA Somorjai
The Journal of Physical Chemistry B 107 (15), 3340-3343, 2003
Sub-60-nm quasiplanar MuGFETs fabricated using a simplified process
N Lindert, L Chang, YK Choi, EH Anderson, WC Lee, TJ King, J Bokor, ...
vol 22, 487-489, 0
High speed flash memory and 1T-DRAM on dopant segregated Schottky barrier (DSSB) FinFET SONOS device for multi-functional SoC applications
SJ Choi, JW Han, S Kim, DH Kim, MG Jang, JH Yang, JS Kim, KH Kim, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
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