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Haisheng Zheng
Haisheng Zheng
Shanghai AI Laboratory
Verified email at pjlab.org.cn - Homepage
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Year
Chateda: A large language model powered autonomous agent for eda
H Wu, Z He, X Zhang, X Yao, S Zheng, H Zheng, B Yu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024
362024
AlphaSyn: Logic synthesis optimization with efficient monte carlo tree search
Z Pei, F Liu, Z He, G Chen, H Zheng, K Zhu, B Yu
2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023
42023
A high-performance accelerator for super-resolution processing on embedded GPU
W Zhao, Y Bai, Q Sun, W Li, H Zheng, N Jiang, J Lu, B Yu, MDF Wong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023
32023
GTuner: Tuning DNN computations on GPU via graph attention network
Q Sun, X Zhang, H Geng, Y Zhao, Y Bai, H Zheng, B Yu
Proceedings of the 59th ACM/IEEE Design Automation Conference, 1045-1050, 2022
32022
Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks
H Wu, H Zheng, B Yu
arXiv preprint arXiv:2401.02731, 2024
22024
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration
Z He, Y Zuo, J Jiang, H Zheng, Y Ma, B Yu
2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023
22023
CBTune: Contextual Bandit Tuning for Logic Synthesis
F Liu, Z Pei, Z Yu, H Zheng, Z He, T Chen, B Yu
2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024
2024
LSTP: A Logic Synthesis Timing Predictor
H Zheng, Z He, F Liu, Z Pei, B Yu
2024
IncreMacro: Incremental Macro Placement Refinement
Y Pu, T Chen, Z He, C Bai, H Zheng, Y Lin, B Yu
2024
LSTP: A Logic Synthesis Timing Predictor
H Zheng, Z He, F Liu, Z Pei, B Yu
IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), 728-733, 2024
2024
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