| Prolonging PCM lifetime through energy-efficient, segment-aware, and wear-resistant page allocation H Aghaei Khouzani, Y Xue, C Yang, A Pandurangi Proceedings of the 2014 international symposium on Low power electronics and …, 2014 | 44 | 2014 |
| Minimizing MLC PCM write energy for free through profiling-based state remapping M Zhao, Y Xue, C Yang, CJ Xue The 20th Asia and South Pacific Design Automation Conference, 502-507, 2015 | 29 | 2015 |
| Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs Y Xue, P Cronin, C Yang, J Hu 2015 25th International Conference on Field Programmable Logic and …, 2015 | 18 | 2015 |
| Routing path reuse maximization for efficient NV-FPGA reconfiguration Y Xue, P Cronin, C Yang, J Hu 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 360-365, 2016 | 15 | 2016 |
| Age-aware Logic and Memory Co-Placement for RRAM-FPGAs Y Xue, C Yang, J Hu Design Automation Conference (DAC), 2017 | 14 | 2017 |
| State asymmetry driven state remapping in phase change memory M Zhao, Y Xue, J Hu, C Yang, T Liu, Z Jia, CJ Xue IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 12 | 2016 |
| Fully exploiting PCM write capacity within near zero cost through segment-based page allocation HA Khouzani, Y Xue, C Yang ACM Journal on Emerging Technologies in Computing Systems (JETC) 12 (4), 1-26, 2016 | 6 | 2016 |
| Power-and endurance-aware neural network training in nvm-based platforms F Meng, Y Xue, C Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 5 | 2018 |
| Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles Y Xue, P Cronin, C Yang, J Hu 2015 IFIP/IEEE International Conference on Very Large Scale Integration …, 2015 | 5 | 2015 |
| Power-aware and Cost-efficient State Encoding in Non-volatile memory based FPGAs Y Xue, A Mcllvaine, C Yang International Conference on Very Large Scale Integration (VLSI-SoC), 2017 | 2 | 2017 |
| Path Reuse-aware Routing for Non-volatile Memory based FPGAs Y Xue, C Yang Integration, the VLSI Journal 6 (58), 505-517, 2017 | 2 | 2017 |
| A Scalable and Process Variation Aware NVM-FPGA Placement Algorithm C Yang, Y Xue Proceedings of the 2019 on Great Lakes Symposium on VLSI, 165-170, 2019 | 1 | 2019 |
| Speeding-up Logic Design and Refining Hardware EDA Flow by Exploring Chinese Character based Graphical Representation S Xue, Y Xue arXiv preprint arXiv:2004.10675, 2020 | | 2020 |
| Reconfiguration optimization for nonvolatile memories based field programmable gate arrays Y Xue University of Delaware, 2018 | | 2018 |
Chengmo YangAssociate Professor of Electrical and Computer Engineering, University of DelawareVerified email at udel.edu
