Sub-lithographic nano interconnect structures, and method for forming same H Yang, W Li US Patent 7,553,760, 2009 | 130 | 2009 |
Method of forming sub-lithographic features using directed self-assembly of polymers J Cheng, K Lai, W Li, YH Na, C Rettner, DP Sanders, D Yang US Patent 8,114,306, 2012 | 113 | 2012 |
Sub-lithographic feature patterning using self-aligned self-assembly polymers H Yang, W Li US Patent 7,605,081, 2009 | 111 | 2009 |
Method for removing threshold voltage adjusting layer with external acid diffusion process KJ Chen, RA Donaton, WS Huang, W Li US Patent 8,227,307, 2012 | 102 | 2012 |
Dual damascene metal interconnect structure having a self-aligned via W Li, HS Yang US Patent 7,696,085, 2010 | 89 | 2010 |
Sub-lithographic local interconnects, and methods for forming same H Yang, JA Mandelman, W Li US Patent 7,592,247, 2009 | 87 | 2009 |
Nanolithography using extreme ultraviolet lithography interferometry: 19 nm lines and spaces HH Solak, D He, W Li, F Cerrina Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 1999 | 86 | 1999 |
Predictors for compliance of standard precautions among nursing students K Cheung, CK Chan, MY Chang, PH Chu, WF Fung, KC Kwan, NY Lau, ... American journal of infection control 43 (7), 729-734, 2015 | 76 | 2015 |
Sub-lithographic interconnect patterning using self-assembling polymers W Li, HS Yang US Patent 7,767,099, 2010 | 75 | 2010 |
Method for fabricating shallow trench isolation structures using diblock copolymer patterning H Yang, W Li US Patent 7,514,339, 2009 | 59 | 2009 |
Method for designing optical lithography masks for directed self-assembly J Cheng, K Lai, W Li, YH Na, JW Pitera, CT Rettner, DP Sanders, D Yang US Patent 8,336,003, 2012 | 58 | 2012 |
Patterning method using a combination of photolithography and copolymer self-assemblying lithography techniques W Li, HS Yang US Patent 8,083,958, 2011 | 55 | 2011 |
Creation of sub-20-nm contact using diblock copolymer on a 300mm wafer for complementary metal oxide semiconductor applications W Li, S Yang Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2007 | 55 | 2007 |
Sub-lithographic dimensioned air gap formation and related structure DC Edelstein, NCM Fuller, DV Horak, EE Huang, W Li, AD Lisi, SV Nitta, ... US Patent 7,943,480, 2011 | 50 | 2011 |
Extreme ultraviolet and x-ray resist: Comparison study D He, H Solak, W Li, F Cerrina Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 1999 | 46 | 1999 |
Directed self-assembly of block copolymers using segmented prepatterns J Cheng, K Lai, W Li, YH Na, C Rettner, DP Sanders US Patent 8,398,868, 2013 | 45 | 2013 |
Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL D Edelstein, H Rathore, C Davis, L Clevenger, A Cowley, T Nogami, ... 2004 IEEE International Reliability Physics Symposium. Proceedings, 316-319, 2004 | 43 | 2004 |
Resist freezing process for double exposure lithography KJR Chen, WS Huang, WK Li, PR Varanasi Advances in Resist Materials and Processing Technology XXV 6923, 155-164, 2008 | 41 | 2008 |
First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers A Vandooren, J Franco, Z Wu, B Parvais, W Li, L Witters, A Walke, L Peng, ... 2018 IEEE International Electron Devices Meeting (IEDM), 7.1. 1-7.1. 4, 2018 | 38 | 2018 |
Wafer-scale integration of double gated WS2-transistors in 300mm Si CMOS fab I Asselberghs, Q Smets, T Schram, B Groven, D Verreck, A Afzalian, ... 2020 IEEE International Electron Devices Meeting (IEDM), 40.2. 1-40.2. 4, 2020 | 36 | 2020 |