Design and implementation of a parallel turbo-decoder ASIC for 3GPP-LTE C Studer, C Benkeser, S Belfanti, Q Huang IEEE Journal of solid-state circuits 46 (1), 8-17, 2010 | 210 | 2010 |
Design and optimization of an HSDPA turbo decoder ASIC C Benkeser, A Burg, T Cupaiuolo, Q Huang IEEE Journal of Solid-State Circuits 44 (1), 98-106, 2008 | 92 | 2008 |
A 1Gbps LTE-advanced turbo-decoder ASIC in 65nm CMOS S Belfanti, C Roth, M Gautschi, C Benkeser, Q Huang 2013 Symposium on VLSI Circuits, C284-C285, 2013 | 70 | 2013 |
VLSI design of a monolithic compressive-sensing wideband analog-to-information converter DE Bellasi, L Bettini, C Benkeser, T Burger, Q Huang, C Studer IEEE Journal on Emerging and Selected Topics in Circuits and Systems 3 (4 …, 2013 | 68 | 2013 |
Efficient parallel turbo-decoding for high-throughput wireless systems C Roth, S Belfanti, C Benkeser, Q Huang IEEE Transactions on Circuits and Systems I: Regular Papers 61 (6), 1824-1835, 2014 | 58 | 2014 |
Implementation trade-offs of soft-input soft-output MAP decoders for convolutional codes C Studer, S Fateh, C Benkeser, Q Huang IEEE Transactions on Circuits and Systems I: Regular Papers 59 (11), 2774-2783, 2012 | 35 | 2012 |
A 390Mb/s 3.57mm23GPP-LTE turbo decoder ASIC in 0.13µm CMOS C Studer, C Benkeser, S Belfanti, Q Huang 2010 IEEE International Solid-State Circuits Conference-(ISSCC), 274-275, 2010 | 35 | 2010 |
On the exploitation of the inherent error resilience of wireless systems under unreliable silicon G Karakonstantis, C Roth, C Benkeser, A Burg Proceedings of the 49th Annual Design Automation Conference, 510-515, 2012 | 33 | 2012 |
Data mapping for unreliable memories C Roth, C Benkeser, C Studer, G Karakonstantis, A Burg 2012 50th Annual Allerton Conference on Communication, Control, and …, 2012 | 27 | 2012 |
A 1.9 GS/s 4-bit sub-Nyquist flash ADC for 3.8 GHz compressive spectrum sensing in 28 nm CMOS D Bellasi, L Bettini, T Burger, Q Huang, C Benkeser, C Studer 2014 IEEE 57th International Midwest Symposium on Circuits and Systems …, 2014 | 23 | 2014 |
A 58mW 1.2mm2HSDPA Turbo Decoder ASIC in 0.13μm CMOS C Benkeser, A Burg, T Cupaiuolo, Q Huang 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 23 | 2008 |
A 50mW HSDPA Baseband Receiver ASIC with Multimode Digital Front-End C Martelli, R Reutemann, C Benkeser, Q Huang 2007 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2007 | 16 | 2007 |
Turbo decoder design for high code rates C Benkeser, C Roth, Q Huang 2012 IEEE/IFIP 20th international conference on VLSI and system-on-chip …, 2012 | 13 | 2012 |
A 4.5 mW digital baseband receiver for level-A evolved EDGE C Benkeser, A Bubenhofer, Q Huang 2010 IEEE International Solid-State Circuits Conference-(ISSCC), 276-277, 2010 | 13 | 2010 |
Low-complexity frequency synchronization for GSM systems: Algorithms and implementation H Kröll, S Zwicky, C Benkeser, Q Huang, A Burg 2012 IV International Congress on Ultra Modern Telecommunications and …, 2012 | 10 | 2012 |
Power efficiency and the mapping of communication algorithms into VLSI C Benkeser ETH Zurich, 2010 | 10 | 2010 |
Efficient Channel Shortening for Higher Order Modulation: Algorithm and Architecture C Benkeser, S Zwicky, H Kröll, J Widmer, Q Huang | 9 | 2012 |
An evolved GSM/EDGE baseband ASIC supporting Rx diversity H Kröll, S Zwicky, B Weber, C Roth, D Tschopp, C Benkeser, A Burg, ... IEEE Journal of Solid-State Circuits 50 (7), 1690-1701, 2015 | 8 | 2015 |
An evolved EDGE PHY ASIC supporting soft-output equalization and RX diversity H Kröll, S Zwicky, B Weber, C Roth, C Benkeser, A Burg, Q Huang ESSCIRC 2014-40th European Solid State Circuits Conference (ESSCIRC), 203-206, 2014 | 6 | 2014 |
A novel constrained-Viterbi algorithm with linear equalization and grouping assistance K Badawi, C Benkeser, C Roth, Q Huang, A Burg 2012 International Symposium on Wireless Communication Systems (ISWCS), 231-235, 2012 | 6 | 2012 |