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Adi Fuchs
Adi Fuchs
Acceleration Architect, Speedata
在 princeton.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
Openpiton: An open source manycore research framework
J Balkind, M McKeown, Y Fu, T Nguyen, Y Zhou, A Lavrov, M Shahrad, ...
Proceedings of the The 21st ACM International Conference on Architectural …, 2016
2542016
The Accelerator Wall: Limits of Chip Specialization
A Fuchs, D Wentzlaff
Proceedings of the 25th IEEE International Symposium on High-Performance …, 2019
762019
Disruptive prefetching: impact on side-channel attacks and cache designs
A Fuchs, RB Lee
Proceedings of the 8th ACM International Systems and Storage Conference, 1-12, 2015
432015
Loop-aware memory prefetching using code block working sets
A Fuchs, S Mannor, U Weiser, Y Etsion
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 533-544, 2014
252014
Scaling Datacenter Accelerators With Compute-Reuse Architectures
A Fuchs, D Wentzlaff
Proceedings of the 45th Annual ACM/IEEE International Symposium on Computer …, 2018
212018
Host channel adapter with pattern-type DMA
A Shahar, N Bloch, A Fuchs
US Patent 8,751,701, 2014
172014
OpenPiton: an open source hardware platform for your research
J Balkind, M McKeown, Y Fu, T Nguyen, Y Zhou, A Lavrov, M Shahrad, ...
Communications of the ACM 62 (12), 79-87, 2019
92019
Lossless Tiling in Convolution Networks—Weight Gradient Calculation
AKS Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu ...
US Patent 11,232,360, 2022
52022
CABLE: a CAche-Based Link Encoder for Bandwidth-starved Manycores
TM Nguyen, A Fuchs, D Wentzlaff
Proceedings of the The 51st Annual IEEE/ACM International Symposium on …, 2018
42018
OpenPit
J Balkind, M McKeown, Y Fu, T Nguyen, Y Zhou, A Lavrov, M Shahrad, ...
22016
Lossless Tiling in Convolution Networks—Padding Before Tiling, Location-Based Tiling, and Zeroing-Out
AKS Tejas Nagendra Babu Nama, Ruddhi Chaphekar, Ram Sivaramakrishnan, Raghu ...
US Patent 11,263,170, 2022
12022
Overcoming the Limitations of Accelerator-Centric Architectures with Memoization-Driven Specialization
A Fuchs
Princeton University, 2019
12019
The Interplay of Transistors and Accelerators
A Fuchs, D Wentzlaff
ACM SRC at MICRO-51, 2, 2018
12018
Lossless tiling in convolution networks—graph metadata generation
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent 12,001,936, 2024
2024
Lossless tiling in convolution networks—tiling configuration for a sequence of sections of a graph
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent 11,995,529, 2024
2024
Lossless tiling in convolution networks-tiling configuration between two sections
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent App. 18/518,695, 2024
2024
Lossless tiling in convolution networks-backward pass
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent 11,934,343, 2024
2024
Lossless Tiling in Convolution Networks-Materialization of Tensors
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent App. 17/384,515, 2022
2022
Lossless Tiling in Convolution Networks-Padding and Re-Tilling at Section Boundaries
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent App. 17/364,141, 2022
2022
Lossless tiling in convolution networks-section cuts
TNB Nama, R Chaphekar, R Sivaramakrishnan, R Prabhakar, S Jairath, ...
US Patent App. 17/687,516, 2022
2022
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