| Multi2sim: A simulation framework to evaluate multicore-multithreaded processors R Ubal, J Sahuquillo, S Petit, P Lopez 19th International Symposium on Computer Architecture and High Performance …, 2007 | 250 | 2007 |
| A simple power-aware scheduling for multicore systems when running real-time applications D Bautista, J Sahuquillo, H Hassan, S Petit, J Duato 2008 IEEE International Symposium on Parallel and Distributed Processing, 1-7, 2008 | 84 | 2008 |
| Exploiting temporal locality in drowsy cache policies S Petit, J Sahuquillo, JM Such, D Kaeli Proceedings of the 2nd conference on Computing frontiers, 371-377, 2005 | 74 | 2005 |
| Application clustering policies to address system fairness with intel’s cache allocation technology V Selfa, J Sahuquillo, L Eeckhout, S Petit, ME Gómez 2017 26th international conference on parallel architectures and compilation …, 2017 | 70 | 2017 |
| An hybrid eDRAM/SRAM macrocell to implement first-level data caches A Valero, J Sahuquillo, S Petit, V Lorente, R Canal, P López, J Duato Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009 | 48 | 2009 |
| L1-bandwidth aware thread allocation in multicore SMT processors J Feliu, J Sahuquillo, S Petit, J Duato Proceedings of the 22nd international conference on Parallel architectures …, 2013 | 42 | 2013 |
| Perf&Fair: A progress-aware scheduler to enhance performance and fairness in SMT multicores J Feliu, J Sahuquillo, S Petit, J Duato IEEE Transactions on Computers 66 (5), 905-911, 2016 | 37 | 2016 |
| Addressing fairness in SMT multicores with a progress-aware scheduler J Feliu, J Sahuquillo, S Petit, J Duato 2015 ieee international parallel and distributed processing symposium, 187-196, 2015 | 36 | 2015 |
| Cache-hierarchy contention-aware scheduling in CMPs J Feliu, S Petit, J Sahuquillo, J Duato IEEE Transactions on Parallel and Distributed Systems 25 (3), 581-590, 2013 | 33 | 2013 |
| Power‐aware scheduling with effective task migration for real‐time multicore embedded systems JL March, J Sahuquillo, S Petit, H Hassan, J Duato Concurrency and Computation: Practice and Experience 25 (14), 1987-2001, 2013 | 31 | 2013 |
| A complexity-effective out-of-order retirement microarchitecture SP Marti, JS Borras, PL Rodriguez, RU Tena, JD Marin IEEE Transactions on computers 58 (12), 1626-1639, 2009 | 29 | 2009 |
| Understanding cache hierarchy contention in CMPs to improve job scheduling J Feliu, J Sahuquillo, S Petit, J Duato 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 25 | 2012 |
| Symbiotic job scheduling on the IBM POWER8 J Feliu, S Eyerman, J Sahuquillo, S Petit 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 23 | 2016 |
| Design of hybrid second-level caches A Valero, J Sahuquillo, S Petit, P López, J Duato IEEE Transactions on Computers 64 (7), 1884-1897, 2014 | 23 | 2014 |
| A new energy-aware dynamic task set partitioning algorithm for soft and hard embedded real-time systems JL March, J Sahuquillo, H Hassan, S Petit, J Duato The Computer Journal 54 (8), 1282-1294, 2011 | 22 | 2011 |
| Bandwidth-aware on-line scheduling in SMT multicores J Feliu, J Sahuquillo, S Petit, J Duato IEEE Transactions on Computers 65 (2), 422-434, 2015 | 21 | 2015 |
| Design, performance, and energy consumption of eDRAM/SRAM macrocells for L1 data caches A Valero, S Petit, J Sahuquillo, P López, J Duato IEEE Transactions on Computers 61 (9), 1231-1242, 2011 | 21 | 2011 |
| Phase-aware cache partitioning to target both turnaround time and system performance L Pons, J Sahuquillo, V Selfa, S Petit, J Pons IEEE Transactions on Parallel and Distributed Systems 31 (11), 2556-2568, 2020 | 20 | 2020 |
| On microarchitectural mechanisms for cache wearout reduction A Valero, N Miralaei, S Petit, J Sahuquillo, TM Jones IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (3), 857-871, 2016 | 20 | 2016 |
| Accurately modeling the on-chip and off-chip GPU memory subsystem F Candel, S Petit, J Sahuquillo, J Duato Future Generation Computer Systems 82, 510-519, 2018 | 16 | 2018 |
Julio SahuquilloProfessor, Universitat Politecnica de Valencia, SpainVerified email at disca.upv.es
