| Design and optimization of SiC super-junction MOSFET using vertical variation doping profile P Vudumula, S Kotamraju IEEE transactions on electron devices 66 (3), 1402-1408, 2019 | 34 | 2019 |
| Design and Optimization of 1.2-kV SiC Planar Inversion MOSFET Using Split Dummy Gate Concept for High-Frequency Applications P Vudumula, S Kotamraju IEEE Transactions on Electron Devices, 1-6, 2019 | 24 | 2019 |
| Improved device characteristics obtained in 4H-SiC MOSFET using high-k dielectric stack with ultrathin SiO2-AlN as interfacial layers VPK Reddy, S Kotamraju Materials Science in Semiconductor Processing 80, 24-30, 2018 | 19 | 2018 |
| 200 V GaN-on-SOI smart power platform for monolithic GaN power ICs T Cosnier, O Syshchyk, B De Jaeger, K Geens, D Cingu, E Fabris, ... 2021 IEEE International Electron Devices Meeting (IEDM), 5.1. 1-5.1. 4, 2021 | 16 | 2021 |
| Effect of Temperature on the Electrical Characteristics of 4H-SiC Planar n/p-Type Junctionless FET: Physics Based Simulation P Vudumula, S Kotamraju Materials Science Forum 963, 679-682, 2019 | 4 | 2019 |
| Improved oxide field and switching performance obtained in a CoolSiCTM trench MOSFET by incorporating the superjunction concept P Vudumula, SK Pelluri, S Kotamraju Semiconductor Science and Technology 34 (1), 015010, 2018 | 4 | 2018 |
| Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits O Syshchyk, T Cosnier, ZH Huang, D Cingu, D Wellekens, A Vohra, ... ESSDERC 2022 - IEEE 52nd European Solid-State Device Research Conference …, 2022 | 3 | 2022 |
| TCAD-based design and verification of the components of a 200 V GaN-IC platform P Vudumula, T Cosnier, O Syshchyk, B Bakeroot, S Decoutere Solid-State Electronics 200, 108496, 2023 | 2 | 2023 |
| The reverse recovery characteristics of an SiC superjunction MOSFET with a p-type Schottky diode embedded at the drain side for improved reliability P Vudumula, S Kotamraju Journal of Computational Electronics 20, 1187-1195, 2021 | 2 | 2021 |
| Improved Device Characteristics Obtained Using a Novel High-K Dielectric Stack for 4H-SiC n-IGBT: HfO2-SiO2- AlN S Kotamraju, P Vudumula Materials Science Forum 963, 647-650, 2019 | 2 | 2019 |
| Performance Analysis of Square Cross Section Based Junctionless Silicon Nanotube FET V Pavan, K Reddy, R Ambika, R Srinivasan Middle-East Journal of Scientific Research 24 (4), 1351-1354, 2016 | 2 | 2016 |
| Improved reverse recovery characteristics obtained in 4H‐SiC double‐trench superjunction MOSFET with an integrated p‐type Schottky diode S Kotamraju, P Vudumula IET Circuits, Devices & Systems 14 (8), 1283-1288, 2020 | 1 | 2020 |
| Visualization of Interface Trap Distribution for Pd/AlN/6H-SiC and Pd/HfO2/6H-SiC MOS Capacitors at 700 K S Kotamraju, P Vudumula Materials Science Forum 1062, 468-471, 2022 | | 2022 |
| An Analysis of Static and Dynamic Characteristics of 12kV 4H-SiC n-IGBT using HfO2-SiO2 Dielectric Stack at High Temperatures P Vudumula, S Kotamraju MRS Advances 3 (59), 3433-3438, 2018 | | 2018 |
Siva KotamrajuIIIT SriCityVerified email at iiits.in
Siva KotamrajuIIIT SriCityVerified email at iiits.in