Fully silicided NiSi and germanided NiGe dual gates on SiO2/Si and Al2O3/Ge-on-insulator MOSFETs CH Huang, DS Yu, A Chin, CH Wu, WJ Chen, CX Zhu, MF Li, BJ Cho, ... 2003 Ieee International Electron Devices Meeting, Technical Digest, 319-322, 2003 | 56 | 2003 |
Characteristics of IGZO TFT Prepared by Atmospheric Pressure Plasma Jet Using PE-ALD Gate Dielectric CH Wu, KM Chang, SH Huang, IC Deng, CJ Wu, WH Chiang, CC Chang IEEE electron device letters 33 (4), 552-554, 2012 | 40 | 2012 |
High temperature stable [Ir3Si-TaN]/HfLaON CMOS with large work-function difference CH Wu, BF Hung, A Chin, SJ Wang, WJ Chen, XP Wang, MF Li, C Zhu, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 37 | 2006 |
Lanthanide and Ir-based dual metal-gate/HfAlON CMOS with large work-function difference DS Yua, A China, CH Wu, MF Li, C Zhu, SJ Wang, WJ Yoo, BF Hung, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 34 | 2005 |
Impact of High- Offset Spacer in 65-nm Node SOI Devices MW Ma, CH Wu, TY Yang, KH Kao, WC Wu, SJ Wang, TS Chao, TF Lei IEEE Electron device letters 28 (3), 238-241, 2007 | 31 | 2007 |
Very Low Vt [Ir-Hf]/HfLaO CMOS Using Novel Self-Aligned Low Temperature Shallow Junctions CF Cheng, CH Wu, NC Su, SJ Wang, SP McAlister, A Chin 2007 IEEE International Electron Devices Meeting, 333-336, 2007 | 28 | 2007 |
Fully silicided NiSi and germanided NiGe dual gates on SiO2 n- and p-MOSFETs DS Yu, CH Wu, CH Huang, A Chin, WJ Chen, C Zhu, MF Li, DL Kwong IEEE Electron Device Letters 24 (12), 739-741, 2003 | 27 | 2003 |
High work function Ir/sub x/Si gates on HfAlON p-MOSFETs CH Wu, DS Yu, A Chin, SJ Wang, MF Li, C Zhu, BF Hung, SP McAlister IEEE electron device letters 27 (2), 90-92, 2006 | 25 | 2006 |
Role of in-situ hydrogen plasma treatment on gate bias stability and performance of a-IGZO thin-film transistors OK Prasad, SK Mohanty, CH Wu, TY Yu, KM Chang Nanotechnology 32 (39), 395203, 2021 | 17 | 2021 |
Characterization of Hf1-xZrxO2 Gate Dielectrics with 0≤ x≤ 1 Prepared by Atomic Layer Deposition for Metal Oxide Semiconductor Field Effect Transistor Applications CK Chiang, CH Wu, CC Liu, JF Lin, CL Yang, JY Wu, SJ Wang Japanese Journal of Applied Physics 51 (1R), 011101, 2011 | 16 | 2011 |
The effect of thermal annealing on the properties of IGZO TFT prepared by atmospheric pressure plasma jet CH Wu, KM Chang, SH Huang, IC Deng, CJ Wu, WH Chiang, JW Lin, ... ECS Transactions 45 (7), 189, 2012 | 15 | 2012 |
High-Temperature Stable HfLaON p-MOSFETs With High-Work-Function Gate CH Wu, BF Hung, A Chin, SJ Wang, XP Wang, MF Li, C Zhu, FY Yen, ... IEEE electron device letters 28 (4), 292-294, 2007 | 15 | 2007 |
HfAlON n-MOSFETs incorporating low-work function gate using ytterbium silicide CH Wu, BF Hung, A Chin, SJ Wang, FY Yen, YT Hou, Y Jin, HJ Tao, ... IEEE electron device letters 27 (6), 454-456, 2006 | 14 | 2006 |
Effects of La2O3 capping layers prepared by different ALD lanthanum precursors on flatband voltage tuning and EOT scaling in TiN/HfO2/SiO2/Si MOS structures CK Chiang, CH Wu, CC Liu, JF Lin, CL Yang, JY Wu, SJ Wang Journal of the Electrochemical Society 158 (4), H447, 2011 | 13 | 2011 |
Interface engineering for 3-bit per cell multilevel resistive switching in AlN based memristor SK Mohanty, PK Reddy, OK Prasad, CH Wu, KM Chang, JC Lin IEEE Electron Device Letters 42 (12), 1770-1773, 2021 | 12 | 2021 |
Improving the electrical and hysteresis performance of amorphous igzo thin-film transistors using co-sputtered zirconium silicon oxide gate dielectrics CH Hung, SJ Wang, PY Liu, CH Wu, HP Yan, NS Wu, TH Lin Materials Science in Semiconductor Processing 67, 84-91, 2017 | 12 | 2017 |
The performance improvement of N2 plasma treatment on ZrO2 gate dielectric thin-film transistors with atmospheric pressure plasma-enhanced chemical vapor deposition IGZO channel CH Wu, BW Huang, KM Chang, SJ Wang, JH Lin, JM Hsu Journal of Nanoscience and Nanotechnology 16 (6), 6044-6048, 2016 | 12 | 2016 |
Improving source/drain contact resistance of amorphous indium–gallium–zinc-oxide thin-film transistors using an n+-ZnO buffer layer CH Hung, SJ Wang, C Lin, CH Wu, YH Chen, PY Liu, YC Tu, TH Lin Japanese Journal of Applied Physics 55 (6S1), 06GG05, 2016 | 11 | 2016 |
High-Temperature Stable Gates With High Work Function on HfSiON p-MOSFETs BF Hung, CH Wu, A Chin, SJ Wang, FY Yen, YT Hou, Y Jin, HJ Tao, ... IEEE transactions on electron devices 54 (2), 257-261, 2007 | 11 | 2007 |
Interface ion-driven, highly stable synaptic memristor for neuromorphic applications U Gawai, CH Wu, D Kumar, KM Chang ACS Applied Electronic Materials 5 (4), 2439-2446, 2023 | 10 | 2023 |