Alberto Sangiovanni Vincentelli

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	总计	2019 年至今
引用	77350	12300
h 指数	129	50
i10 指数	759	229

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Luciano LavagnoPolitecnico di Torino在 polito.it 的电子邮件经过验证
Tiziano VillaProfessore d'informatica, Universita' di Verona在 univr.it 的电子邮件经过验证
Sanjit A. SeshiaProfessor of EECS, University of California, Berkeley在 eecs.berkeley.edu 的电子邮件经过验证
Luca CarloniProfessor and Chair of Computer Science, Columbia University在 cs.columbia.edu 的电子邮件经过验证
Roberto PasseroneProfessor of Electrical Engineering and Computer Sciences, University of Trento在 unitn.it 的电子邮件经过验证
Pierluigi NuzzoEECS Department, University of California, Berkeley在 eecs.berkeley.edu 的电子邮件经过验证
Marco Di NataleFull Professor, TECIP Institute, Scuola Superiore S. Anna在 sssup.it 的电子邮件经过验证
Maria Domenica Di BenedettoProfessor, University of L'Aquila, Italy在 univaq.it 的电子邮件经过验证
Edward A. LEEProfessor of Electrical Engineering and Computer Sciences, University of California at Berkeley在 berkeley.edu 的电子邮件经过验证
Edoardo CharbonProfessor of Advanced Quantum Architectures, EPFL在 epfl.ch 的电子邮件经过验证
Jan RabaeyProfessor of EECS, University of California at Berkeley在 berkeley.edu 的电子邮件经过验证
Luca BenvenutiSapienza Università di Roma在 uniroma1.it 的电子邮件经过验证
Sunil KhatriTexas A&M University在 tamu.edu 的电子邮件经过验证
Qi ZhuProfessor of Computer Engineering在 northwestern.edu 的电子邮件经过验证
Mehdi MaasoumyPhD, University of California, Berkeley在 berkeley.edu 的电子邮件经过验证
Alessandro PintoNASA Jet Propulsion Laboratory在 jpl.nasa.gov 的电子邮件经过验证
Haibo ZengElectrical & Computer Engineering, Virginia Tech在 vt.edu 的电子邮件经过验证
Abhijit DavareResearch Scientist, Intel在 intel.com 的电子邮件经过验证
Alper DemirProfessor of Electrical Engineering, Koc University, Turkey在 ku.edu.tr 的电子邮件经过验证
Carlo FischioneProfessor, KTH, EECS, Network and Systems Engineering在 kth.se 的电子邮件经过验证

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Alberto Sangiovanni Vincentelli

Professor of EECS, University of California, Berkeley

在 eecs.berkeley.edu 的电子邮件经过验证 - 首页

System design embedded systems design automation verification synthesis


标题按引用次数排序按年份排序按标题排序	引用次数引用次数	年份
Logic minimization algorithms for VLSI synthesis RK Brayton Springer, 1984	2726	1984
SIS: A system for sequential circuit synthesis ME Sentovich Memorandom no. UCB/ERL M92/41, 1992	2496	1992
MIS: A multiple-level logic optimization system RK Brayton, R Rudell, A Sangiovanni-Vincentelli, AR Wang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987	1654	1987
System-level design: Orthogonalization of concerns and platform-based design K Keutzer, AR Newton, JM Rabaey, A Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 2000	1362	2000
Hardware-software co-design of embedded systems: the POLIS approach F Balarin, P Giusto, A Jurecska, C Passerone, E Sentovich, B Tabbara, ... Springer Science & Business Media, 2012	1146	2012
The waveform relaxation method for time-domain analysis of large scale integrated circuits E Lelarasmee, AE Ruehli, AL Sangiovanni-Vincentelli IEEE transactions on computer-aided design of integrated circuits and …, 1982	1098	1982
Modeling cyber–physical systems P Derler, EA Lee, AS Vincentelli Proceedings of the IEEE 100 (1), 13-28, 2011	1054	2011
VIS: A system for verification and synthesis RK Brayton, GD Hachtel, A Sangiovanni-Vincentelli, F Somenzi, A Aziz, ... Computer Aided Verification: 8th International Conference, CAV'96 New …, 1996	977	1996
A framework for comparing models of computation EA Lee, A Sangiovanni-Vincentelli IEEE Transactions on computer-aided design of integrated circuits and …, 1998	925	1998
Design of embedded systems: Formal models, validation, and synthesis S Edwards, L Lavagno, EA Lee, A Sangiovanni-Vincentelli Proceedings of the IEEE 85 (3), 366-390, 1997	822	1997
The TimberWolf placement and routing package C Sechen, A Sangiovanni-Vincentelli IEEE Journal of Solid-State Circuits 20 (2), 510-522, 1985	764	1985
Logic verification using binary decision diagrams in a logic synthesis environment S Malik, AR Wang, RK Brayton, A Sangiovanni-Vincentelli 1988 IEEE International Conference on Computer-Aided Design, 6, 7, 8, 9-6, 7 …, 1988	752	1988
Sequential circuit design using synthesis and optimization EM Sentovich, KJ Singh, C Moon, H Savoj, RK Brayton, ... Proceedings 1992 IEEE International Conference on Computer Design: VLSI in …, 1992	715	1992
Steady-state methods for simulating analog and microwave circuits KS Kundert, JK White, AL Sangiovanni-Vincentelli Springer Science & Business Media, 2013	710	2013
Convergence and finite-time behavior of simulated annealing D Mitra, F Romeo, A Sangiovanni-Vincentelli Advances in applied probability 18 (3), 747-771, 1986	708	1986
Metropolis: An integrated electronic system design environment F Balarin, Y Watanabe, H Hsieh, L Lavagno, C Passerone, ... Computer 36 (4), 45-52, 2003	674	2003
Platform-based design and software design methodology for embedded systems A Sangiovanni-Vincentelli, G Martin IEEE Design & Test of Computers 18 (6), 23-33, 2001	644	2001
Multilevel logic synthesis RK Brayton, GD Hachtel, AL Sangiovanni-Vincentelli Proceedings of the IEEE 78 (2), 264-300, 1990	636	1990
Implicit state enumeration of finite state machines using BDD's J Herve, S Hamid, L Bill, KB Robert, SV Alberto in Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 …, 1990	601	1990
Multiple-valued minimization for PLA optimization RL Rudell, A Sangiovanni-Vincentelli IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1987	595	1987

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