| A five-stage pipeline, 204 cycles/MB, single-port SRAM-based deblocking filter for H. 264/AVC K Xu, CS Choy IEEE Transactions on Circuits and Systems for Video Technology 18 (3), 363-374, 2008 | 81 | 2008 |
| A power-efficient and self-adaptive prediction engine for H. 264/AVC decoding K Xu, CS Choy IEEE Transactions on very large scale integration (VLSI) systems 16 (3), 302-313, 2008 | 46 | 2008 |
| Low-power H. 264/AVC baseline decoder for portable applications K Xu, CS Choy Proceedings of the 2007 international symposium on Low power electronics and …, 2007 | 23 | 2007 |
| Methods for Power/throughput/area Optimization of H. 264/AVC Decoding K Xu, TM Liu, JI Guo, CS Choy Journal of Signal Processing Systems 60 (1), 131-145, 2010 | 20 | 2010 |
| Learned smartphone ISP on mobile GPUs with deep learning, mobile AI & AIM 2022 challenge: report A Ignatov, R Timofte, S Liu, C Feng, F Bai, X Wang, L Lei, Z Yi, Y Xiang, ... European Conference on Computer Vision, 44-70, 2022 | 18 | 2022 |
| A hardware implementation of ZUC-256 stream cipher Y Wang, L Wu, X Zhang, K Xu, W Yang 2020 IEEE 14th International Conference on Anti-counterfeiting, Security …, 2020 | 12 | 2020 |
| Power-efficient VLSI implementation of bitstream parsing in H. 264/AVC decoder K Xu, CS Choy, CF Chan, KP Pun 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp., 2006 | 9 | 2006 |
| A novel ASIC implementation of RSA algorithm ZKZ Keija, XKX Ke, WYW Yang, MHM Hao ASIC, 2003. Proceedings. 5th International Conference on 2, 1300-1303, 2003 | 9 | 2003 |
| A low-power bitstream controller for H. 264/AVC baseline decoding K Xu, C Choy, C Chan, K Pun 2006 Proceedings of the 32nd European Solid-State Circuits Conference, 162-165, 2006 | 8 | 2006 |
| Low-power bitstream-residual decoder for H. 264/AVC baseline profile decoding K Xu, CS Choy EURASIP Journal on Embedded Systems 2009, 1-17, 2010 | 7 | 2010 |
| Priority-based heading one detector in H. 264/AVC decoding K Xu, CS Choy, CF Chan, KP Pun EURASIP Journal on Embedded Systems 2007, 1-7, 2007 | 7 | 2007 |
| The architecture of the Java extension of 32-bit RISC for smart cards and other embedded systems LXL Xin, KXK Xu, HMH Min ASIC, 2003. Proceedings. 5th International Conference on 1, 397-400, 2003 | 6 | 2003 |
| Convolutional Neural Network Accelerator on FPGA H Wang, X Zhang, D Kong, G Lu, D Zhen, F Zhu, K Xu | 5 | 2019 |
| A low-power pyramid motion estimation engine for 4K@ 30fps realtime HEVC video encoding K Xu, B Huang, X Liu, X Tu, Z Wu, Z Yan, P Liu, B Han, Y Li 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2018 | 5 | 2018 |
| A low-power 4096x2160@ 30fps H. 265/HEVC video encoder for smart video surveillance K Xu, Y Li, B Huang, X Liu, H Wang, Z Wu, Z Yan, X Tu, T Wu, D Zeng Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 4 | 2018 |
| A Low-power Computer Vision Engine for Video Surveillance K Xu, Y Li, B Han, X Zhang, X Liu, J Ai 2018 IEEE International Conference on Integrated Circuits, Technologies and …, 2018 | 3 | 2018 |
| SYENet: A Simple Yet Effective Network for Multiple Low-Level Vision Tasks with Real-time Performance on Mobile Device W Gou, Z Yi, Y Xiang, S Li, Z Liu, D Kong, K Xu Proceedings of the IEEE/CVF International Conference on Computer Vision …, 2023 | 2 | 2023 |
| Design a Low-Power H. 264/AVC Baseline Decoder at All Abstraction Levels—A Showcase K Xu, M Zhang, CS Choy Journal of Signal Processing Systems, 1-14, 2010 | 2 | 2010 |
| Power-Efficient VLSI Realization of a Complex FSM for H. 264/AVC Bitstream Parsing K Xu, CS Choy, CF Chan, KP Pun Circuits and Systems II: Express Briefs, IEEE Transactions on 54 (11), 984-988, 2007 | 2 | 2007 |
| A novel offset compensation biquad switched-capacitor filter design LQL Qiang, HYH Yifeng, XKX Ke, MHM Hao ASIC, 2003. Proceedings. 5th International Conference on 1, 643-646, 2003 | 2 | 2003 |
