| RippleFPGA: A routability-driven placement for large-scale heterogeneous FPGAs CW Pui, G Chen, WK Chow, KC Lam, J Kuang, P Tu, H Zhang, ... 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 39 | 2016 |
| Clock-aware ultrascale FPGA placement with machine learning routability prediction CW Pui, G Chen, Y Ma, EFY Young, B Yu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 929-936, 2017 | 30 | 2017 |
| Legalization algorithm for multiple-row height standard cell design WK Chow, CW Pui, EFY Young 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2016 | 29 | 2016 |
| Detailed routing by sparse grid graph and minimum-area-captured path search G Chen, CW Pui, H Li, J Chen, B Jiang, EFY Young Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019 | 17 | 2019 |
| RippleFPGA: Routability-driven simultaneous packing and placement for modern FPGAs G Chen, CW Pui, WK Chow, KC Lam, J Kuang, EFY Young, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 17 | 2017 |
| Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search G Chen, CW Pui, H Li, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2019 | 8 | 2019 |
| Device layer-aware analytical placement for analog circuits B Xu, S Li, CW Pui, D Liu, L Shen, Y Lin, N Sun, DZ Pan Proceedings of the 2019 International Symposium on Physical Design, 19-26, 2019 | 8 | 2019 |
| An analytical approach for time-division multiplexing optimization in multi-fpga based systems CW Pui, G Wu, FYC Mang, EFY Young 2019 ACM/IEEE International Workshop on System Level Interconnect Prediction …, 2019 | 7 | 2019 |
| CUGR: Detailed-Routability-Driven 3D Global Routing with Probabilistic Resource Model J Liu, CW Pui, F Wang, EFY Young 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 4 | 2020 |
| Lagrangian relaxation-based time-division multiplexing optimization for multi-FPGA systems CW Pui, EFY Young ACM Transactions on Design Automation of Electronic Systems (TODAES) 25 (2 …, 2020 | 2 | 2020 |
| Simultaneous Reconnection Surgery Technique of Routing With Machine Learning-Based Acceleration P Tu, CW Pui, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 1 | 2019 |
| A two-step search engine for large scale boolean matching under NP3 equivalence CW Pui, P Tu, H Li, G Chen, EFY Young 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), 592-598, 2018 | 1 | 2018 |
| Multi-FPGA Co-optimization: Hybrid Routing and Competitive-based Time Division Multiplexing Assignment D Zheng, X Zhang, CW Pui, EFY Young Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | | 2021 |
| Resource Constrained Place and Route for FPGA CW Pui PQDT-Global, 2019 | | 2019 |
| Simultaneous Timing Driven Tree Surgery in Routing with Machine Learning-based Acceleration P Tu, CW Pui, EFY Young Proceedings of the 2018 on Great Lakes Symposium on VLSI, 261-266, 2018 | | 2018 |
| 一种手势识别系统及方法 Y Zhu, H Ma, CW Pui, H Gong CN Patent 104,111,733, 2017 | | 2017 |
Evangeline F.Y. YoungThe Chinese University of Hong KongVerified email at cse.cuhk.edu.hk
