‪Jiawen Wu‬ - ‪Google Scholar‬

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Jianan MuInstitute of Computing Technology, State Key Laboratory of Processors (SKLP), Chinese Academy ofVerified email at ict.ac.cn
Chip Hong ChangNanyang Technological UniversityVerified email at ntu.edu.sg
Xiaowei Li (李晓维)Institute of Computing Technology, Chinese Academy of SciencesVerified email at ict.ac.cn

Jiawen Wu

Jiawen Wu

Texas A&M University

Verified email at tamu.edu - Homepage

Computer Architecture VLSI Design Hardware Security


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Energy-efficient ntt design with one-bank sram and 2-d pe array J Mu, H Tan, J Wu, H Lu, CH Chang, S Chen, S Liang, J Ye, H Li, X Li 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-2, 2023	2	2023
PFDCT: An Enhanced Transport Layer Protocol for Precise Flow Control in Data Centers Z Li, H Wang, X Yi, X Zhang, J Wu, Y Zhang, P Luo, K Liu Electronics 12 (8), 1890, 2023	1	2023
ModSRAM: Algorithm-Hardware Co-Design for Large Number Modular Multiplication in SRAM J Ku, J Zhang, H Shan, S Samudrala, J Wu, Q Zheng, Z Li, JV Rajendran, ... arXiv preprint arXiv:2402.14152, 2024		2024

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