| Radiation-induced soft error rate analyses for 14 nm FinFET SRAM devices S Lee, I Kim, S Ha, C Yu, J Noh, S Pae, J Park 2015 IEEE International Reliability Physics Symposium, 4B. 1.1-4B. 1.4, 2015 | 83 | 2015 |
| Thermodynamic Studies of β-Ga2O3 Nanomembrane Field-Effect Transistors on a Sapphire Substrate H Zhou, K Maize, J Noh, A Shakouri, PD Ye ACS omega 2 (11), 7723-7729, 2017 | 80 | 2017 |
| Study of neutron soft error rate (SER) sensitivity: Investigation of upset mechanisms by comparative simulation of FinFET and planar MOSFET SRAMs J Noh, V Correas, S Lee, J Jeon, I Nofal, J Cerba, H Belhaddad, ... IEEE Transactions on Nuclear Science 62 (4), 1642-1649, 2015 | 54 | 2015 |
| High Performance -Ga2O3 Nano-Membrane Field Effect Transistors on a High Thermal Conductivity Diamond Substrate J Noh, S Alajlouni, MJ Tadjer, JC Culbertson, H Bae, M Si, H Zhou, ... IEEE Journal of the Electron Devices Society 7, 914-918, 2019 | 45 | 2019 |
| Solar-Blind UV Photodetector Based on Atomic Layer-Deposited Cu2O and Nanomembrane β-Ga2O3 pn Oxide Heterojunction H Bae, A Charnas, X Sun, J Noh, M Si, W Chung, G Qiu, X Lyu, ... ACS omega 4 (24), 20756-20761, 2019 | 28 | 2019 |
| Electrothermal performance limit of β-Ga2O3 field-effect transistors BK Mahajan, YP Chen, J Noh, PD Ye, MA Alam Applied Physics Letters 115 (17), 173508, 2019 | 22 | 2019 |
| The impact of substrates on the performance of top-gate p-Ga203 field-effect transistors: record high drain current of 980 mA/mm on diamond J Noh, M Si, H Zhou, MJ Tadjer, DY Peide 2018 76th Device Research Conference (DRC), 1-2, 2018 | 17 | 2018 |
| BEOL Compatible Indium-Tin-Oxide Transistors: Switching of Ultrahigh-Density 2-D Electron Gas Over 0.8 × 1014/cm2 at Oxide/Oxide Interface by the Change of … M Si, A Murray, Z Lin, J Andler, J Li, J Noh, S Alajlouni, C Niu, X Lyu, ... IEEE Transactions on Electron Devices 68 (7), 3195-3199, 2021 | 16 | 2021 |
| A metasurface optical modulator using voltage-controlled population of quantum well states R Sarma, S Campione, M Goldflam, J Shank, J Noh, LT Le, MD Lange, ... Applied Physics Letters 113 (20), 201101, 2018 | 15 | 2018 |
| Ultraviolet Light-Based Current–Voltage Method for Simultaneous Extraction of Donor- and Acceptor-Like Interface Traps in -Ga2O3 FETs H Bae, J Noh, S Alghamdi, M Si, DY Peide IEEE Electron Device Letters 39 (11), 1708-1711, 2018 | 14 | 2018 |
| Low dissipation spectral filtering using a field-effect tunable III–V hybrid metasurface R Sarma, S Campione, M Goldflam, J Shank, J Noh, S Smith, PD Ye, ... Applied Physics Letters 113 (6), 061108, 2018 | 13 | 2018 |
| Semiconductor devices JH Noh, ST Kim, JH Yoo, BR Lee, JS Jeon US Patent 9,472,659, 2016 | 13 | 2016 |
| First experimental demonstration of robust HZO/β-Ga₂O₃ ferroelectric field-effect transistors as synaptic devices for artificial intelligence applications in a high … J Noh, H Bae, J Li, Y Luo, Y Qu, TJ Park, M Si, X Chen, AR Charnas, ... IEEE Transactions on Electron Devices 68 (5), 2515-2521, 2021 | 10 | 2021 |
| Structural effects on heat dissipation in InGaAs MHEMTs J Noh, Y Ryoo, N Jeon, HY Cha, KS Seo Semiconductor science and technology 28 (4), 045012, 2013 | 10 | 2013 |
| The impact of channel semiconductor on the memory characteristics of ferroelectric field-effect transistors M Si, Z Lin, J Noh, J Li, W Chung, DY Peide IEEE Journal of the Electron Devices Society 8, 846-849, 2020 | 8 | 2020 |
| Semiconductor device JH Yoo, JH Noh, KM Chun, JS Jeon US Patent 10,056,479, 2018 | 8 | 2018 |
| Semiconductor device using three dimensional channel KY Kim, JH Yoo, JH Noh, WY Maeng, YW Jeon US Patent 9,437,730, 2016 | 7 | 2016 |
| Enhancement of Thermal Transfer From β-Ga2O3 Nano-Membrane Field-Effect Transistors to High Thermal Conductivity Substrate by Inserting an Interlayer J Noh, PR Chowdhury, M Segovia, S Alajlouni, M Si, AR Charnas, ... IEEE Transactions on Electron Devices 69 (3), 1186-1190, 2022 | 6 | 2022 |
| First demonstration of robust tri-gate β-Ga2O3 nano-membrane field-effect transistors H Bae, TJ Park, J Noh, W Chung, M Si, S Ramanathan, DY Peide Nanotechnology 33 (12), 125201, 2021 | 6* | 2021 |
| Layout design system, semiconductor device fabricated by using the system and method for fabricating the semiconductor device KH Baek, JH Noh, TJ Song, G Yang, OH Sang-Kyu US Patent 9,576,953, 2017 | 6 | 2017 |
Peide YeRichard J. and Mary Jo Schwartz Professor of Electrical and Computer Engineering, Purdue UniversityVerified email at purdue.edu
