| Threshold logic in a flash A Wagle, G Singh, J Yang, S Khatri, S Vrudhula 2019 IEEE 37th International Conference on Computer Design (ICCD), 550-558, 2019 | 13 | 2019 |
| A configurable BNN ASIC using a network of programmable threshold logic standard cells A Wagle, S Khatri, S Vrudhula 2020 IEEE 38th International Conference on Computer Design (ICCD), 433-440, 2020 | 8 | 2020 |
| Heterogeneous FPGA architecture using threshold logic gates for improved area, power, and performance A Wagle, S Vrudhula IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 7 | 2021 |
| Cidan-xe: Computing in dram with artificial neurons G Singh, A Wagle, S Khatri, S Vrudhula Frontiers in Electronics 3, 834146, 2022 | 4 | 2022 |
| FPGA with reconfigurable threshold logic gates for improved performance, power, and area S Vrudhula, A Wagle US Patent 11,356,100, 2022 | 3 | 2022 |
| A novel asic design flow using weight-tunable binary neurons as standard cells A Wagle, G Singh, S Khatri, S Vrudhula IEEE Transactions on Circuits and Systems I: Regular Papers 69 (7), 2968-2981, 2022 | 3 | 2022 |
| FPGAs with reconfigurable threshold logic gates for improved performance, power and area A Wagle, J Yang, A Dengi, S Vrudhula 2018 28th International Conference on Field Programmable Logic and …, 2018 | 3 | 2018 |
| Tunable precision control for approximate image filtering in an in-memory architecture with embedded neurons A Dube, A Wagle, G Singh, S Vrudhula Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided …, 2022 | 2 | 2022 |
| Embedding binary perceptrons in FPGA to improve area, power and performance A Wagle, E Azari, S Vrudhula 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019 | 2 | 2019 |
| A New Approach to Clock Skewing for Area and Power Optimization of ASICs using Differential Flipflops and Local Clocking A Wagle, J Yang, N Kulkarni, S Vrudhula IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 1 | 2023 |
| Configurable bnn asic using a network of programmable threshold logic standard cells A Wagle, S Vrudhula, S Khatri US Patent App. 17/504,279, 2022 | 1 | 2022 |
| Threshold logic gates using flash transistors S Vrudhula, S Khatri, A Wagle WO Patent WO2021011394A1, 2021 | 1 | 2021 |
| A Statistical Methodology for Post-Fabrication Weight Tuning in a Binary Perceptron E Azari, A Wagle, S Khatri, S Vrudhula 2020 21st International Symposium on Quality Electronic Design (ISQED), 141-148, 2020 | 1 | 2020 |
| An ASIC Accelerator for QNN with Variable Precision and Tunable Energy-Efficiency A Wagle, G Singh, S Khatri, S Vrudhula IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | | 2024 |
| Computing in memory with artificial neurons S Vrudhula, A Wagle, G Singh US Patent App. 18/324,858, 2023 | | 2023 |
| Neuron-based Digital and Mixed-signal Circuit Design: From ASIC to SIMD Processors A Wagle Arizona State University, 2023 | | 2023 |
| Flash: A “Forgotten” Technology in VLSI Design SP Khatri, S Vrudhula, M Abusultan, K Bharathi, SW Chu, CY Lee, ... Frontiers of Quality Electronic Design (QED) AI, IoT and Hardware Security …, 2022 | | 2022 |
| Cidan-xe: Computing in dram with artificial neurons G Singh, A Wagle, S Khatri, S Vrudhula Frontiers in Electronics 3, 834146, 2022 | | 2022 |
Sunil KhatriTexas A&M UniversityVerified email at tamu.edu
