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Saibal Mukhopadhyay
Saibal Mukhopadhyay
Professor of Electrical Engineering, Georgia Institute of Technology
Verified email at ece.gatech.edu
Title
Cited by
Cited by
Year
Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
K Roy, S Mukhopadhyay, H Mahmoodi-Meimand
Proceedings of the IEEE 91 (2), 305-327, 2003
31332003
Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS
S Mukhopadhyay, H Mahmoodi, K Roy
IEEE transactions on computer-aided design of integrated circuits and …, 2005
5992005
Neurocube: A programmable digital neuromorphic architecture with high-density 3D memory
D Kim, J Kung, S Chai, S Yalamanchili, S Mukhopadhyay
ACM SIGARCH Computer Architecture News 44 (3), 380-392, 2016
4742016
A circuit-compatible model of ballistic carbon nanotube field-effect transistors
A Raychowdhury, S Mukhopadhyay, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
2872004
Gate leakage reduction for scaled devices using transistor stacking
S Mukhopadhyay, C Neau, RT Cakici, A Agarwal, CH Kim, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 11 (4), 716-730, 2003
2172003
Process variation in embedded memories: failure analysis and variation aware architecture
A Agarwal, BC Paul, S Mukhopadhyay, K Roy
IEEE Journal of Solid-State Circuits 40 (9), 1804-1814, 2005
2142005
Leakage power analysis and reduction for nanoscale circuits
A Agarwal, S Mukhopadhyay, A Raychowdhury, K Roy, CH Kim
IEeE Micro 26 (2), 68-80, 2006
2102006
Estimation of delay variations due to random-dopant fluctuations in nanoscale CMOS circuits
H Mahmoodi, S Mukhopadhyay, K Roy
IEEE Journal of Solid-State Circuits 40 (9), 1787-1796, 2005
1902005
Low-power scan design using first-level supply gating
S Bhunia, H Mahmoodi, D Ghosh, S Mukhopadhyay, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (3), 384-395, 2005
1742005
Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling
S Mukhopadhyay, A Raychowdhury, K Roy
Proceedings of the 40th annual Design Automation Conference, 169-174, 2003
1702003
Statistical design and optimization of SRAM cell for yield enhancement
S Mukhopadhyay, H Mahmoodi, K Roy
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
1682004
Modeling and estimation of total leakage current in nano-scaled CMOS devices considering the effect of parameter variation
S Mukhopadhyay, K Roy
Proceedings of the 2003 international symposium on Low power electronics and …, 2003
1652003
Edge-host partitioning of deep neural networks with feature space encoding for resource-constrained internet-of-things platforms
JH Ko, T Na, MF Amir, S Mukhopadhyay
2018 15th IEEE International Conference on Advanced Video and Signal Based …, 2018
1492018
A forward body-biased low-leakage SRAM cache: device, circuit and architecture considerations
CH Kim, JJ Kim, S Mukhopadhyay, K Roy
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (3), 349-357, 2005
1402005
Design of reliable DNN accelerator with un-reliable ReRAM
Y Long, X She, S Mukhopadhyay
2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019
1362019
An energy efficient cache design using spin torque transfer (STT) RAM
M Rasquinha, D Choudhary, S Chatterjee, S Mukhopadhyay, ...
Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010
1322010
Accurate estimation of total leakage in nanometer-scale bulk CMOS circuits based on device geometry and doping profile
S Mukhopadhyay, A Raychowdhury, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
1322005
Device-optimization technique for robust and low-power FinFET SRAM design in nanoscale era
A Bansal, S Mukhopadhyay, K Roy
IEEE Transactions on Electron Devices 54 (6), 1409-1419, 2007
1232007
ReRAM-based processing-in-memory architecture for recurrent neural network acceleration
Y Long, T Na, S Mukhopadhyay
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (12 …, 2018
1182018
Cascade adversarial machine learning regularized with a unified embedding
T Na, JH Ko, S Mukhopadhyay
arXiv preprint arXiv:1708.02582, 2017
1162017
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