| Low power 2: 1 mux for barrel shifter P Khandekar, S Subbaraman 2008 First International Conference on Emerging Trends in Engineering and …, 2008 | 26 | 2008 |
| LOW POWER DIGITAL DESIGN USING ENERGY RECOVERY ADIABATIC LOGIC P Khandekar, S Subbaraman, M Patil International Journal of Engineering Research and Industrial Applications …, 2010 | 18 | 2010 |
| Implementation and Analysis of Quasi-Adiabatic Inverters P Khandekar, S Subbaraman, A Chitre International conference of engineers and computer Scientist 2, 2010 | 16* | 2010 |
| Noise estimation in 2D MRI using DWT coefficients and optimized neural network V Shukla, P Khandekar, A Khaparde Biomedical Signal Processing and Control 71, 103225, 2022 | 12 | 2022 |
| Multi-channel programmable power supply with temperature compensation for silicon sensors Shukla, Achanta, Dugad, Freeman, Garde, Gupta, P Khandekar, Kurup, ... Review of Scientific Instruments 87 (1), 2016 | 7 | 2016 |
| Three dimensional image reconstruction using interpolation of distance and image registration S Agarwal, S Khade, Y Dandawate, P Khandekar 2015 International Conference on Computer, Communication and Control (IC4), 1-5, 2015 | 7 | 2015 |
| Variable quality factor jpeg image compression using dynamic partial reconfiguration and microblaze J Sarkhawas, P Khandekar, A Kulkarni 2015 International Conference on Computing Communication Control and …, 2015 | 7 | 2015 |
| Low power inverter and barrel shifter design using adiabatic principle P Khandekar, S Subbaraman Advances in Computational Sciences and Technology 3 (1), 57-65, 2010 | 5 | 2010 |
| A Survey of Power Supply Techniques for Silicon Photo-multiplier Biasing Shukla, Rakshe, Lokhandwala, Dugad, P Khandekar, Garde, Gupta International Journal of Engineering Research and General Science 2 (4), 599-603, 2014 | 4 | 2014 |
| Design and implementation of low power clock distribution network A Kulkarni, P Khandekar IEEE-International Conference On Advances In Engineering, Science And …, 2012 | 3 | 2012 |
| Optimal Conditions for Ultra Low Power Digital Circuits P Khandekar, S Subbaraman JOURNAL OF ACTIVE AND PASSIVE ELECTRONIC DEVICES 6 (1-2), 157-167, 2011 | 3 | 2011 |
| Optimizing 2:1 MUX for Low Power Design Using Adiabatic Logic P Khandekar, S Subbaraman, M Patil International Conference on VLSI Design and Embedded Systems (ICVLSI’08 …, 2008 | 3* | 2008 |
| Survey of Stochastic Number Generators and Optimizing Techniques P Nahar, P Khandekar, M Deshmukh, HS Jatana, U Khambete Lecture Notes in Electrical Engineering 959, 405-415, 2023 | 2 | 2023 |
| Implementation and analysis of power clock generation method for adiabetic circuits A Kenjale, P Khandekar, A Chitre 2012 International Conference on Devices, Circuits and Systems (ICDCS), 272-275, 2012 | 2 | 2012 |
| Implementation and analysis of VCO based power-clock supply generator P Khandekar, S Subbaraman, A Sharma 2009 International Conference on Industrial and Information Systems (ICIIS …, 2009 | 2 | 2009 |
| Quasi-adiabatic 2× 2 Barrel Shifter P Khandekar, S Subbaraman, VR Vinjamoori 2009 International Conference on Industrial and Information Systems (ICIIS …, 2009 | 2 | 2009 |
| Implementation of Low Power 2: 1 MUX for Barrel Shifter P Khandekar, S Subbaraman First International Conference on Emerging Trends in Engineering and …, 2008 | 2* | 2008 |
| Design of FPGA Building Blocks Using LTspice® K Khairkar, P Khandekar 2021 4th International Conference on Recent Developments in Control …, 2021 | 1 | 2021 |
| 2-D psychoacoustic modeling for automatic speech recognition in noisy environment S Desai, P Khandekar, K Raut 2016 Conference on Advances in Signal Processing (CASP), 129-132, 2016 | 1 | 2016 |
| Implementation of super-resolution algorithm on FPGA S Hurdale, P Khandekar 2015 IEEE International Conference on Computational Intelligence and …, 2015 | 1 | 2015 |
