| Going deeper with embedded FPGA platform for convolutional neural network J Qiu, J Wang, S Yao, K Guo, B Li, E Zhou, J Yu, T Tang, N Xu, S Song, ... Proceedings of the 2016 ACM/SIGDA international symposium on field …, 2016 | 1497 | 2016 |
| Ese: Efficient speech recognition engine with sparse lstm on fpga S Han, J Kang, H Mao, Y Hu, X Li, Y Li, D Xie, H Luo, S Yao, Y Wang, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 850 | 2017 |
| Angel-eye: A complete design flow for mapping CNN onto embedded FPGA K Guo, L Sui, J Qiu, J Yu, J Wang, S Yao, S Han, Y Wang, H Yang IEEE transactions on computer-aided design of integrated circuits and …, 2017 | 620 | 2017 |
| A survey of FPGA-based neural network accelerator K Guo, S Zeng, J Yu, Y Wang, H Yang arXiv preprint arXiv:1712.08934, 2017 | 341 | 2017 |
| Accurate temperature-dependent integrated circuit leakage power estimation is easy Y Liu, RP Dick, L Shang, H Yang 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 309 | 2007 |
| Machine learning for electronic design automation: A survey G Huang, J Hu, Y He, J Liu, M Ma, Z Shen, J Wu, Y Xu, H Zhang, K Zhong, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 26 (5 …, 2021 | 267 | 2021 |
| A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops Y Wang, Y Liu, S Li, D Zhang, B Zhao, MF Chiang, Y Yan, B Sai, H Yang 2012 Proceedings of the ESSCIRC (ESSCIRC), 149-152, 2012 | 257 | 2012 |
| Technological exploration of RRAM crossbar array for matrix-vector multiplication L Xia, P Gu, B Li, T Tang, X Yin, W Huangfu, S Yu, Y Cao, Y Wang, ... Journal of Computer Science and Technology 31 (1), 3-19, 2016 | 251 | 2016 |
| FPMR: MapReduce framework on FPGA Y Shan, B Wang, J Yan, Y Wang, N Xu, H Yang Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 233 | 2010 |
| MNSIM: Simulation platform for memristor-based neuromorphic computing system L Xia, B Li, T Tang, P Gu, PY Chen, S Yu, Y Cao, Y Wang, Y Xie, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 229 | 2017 |
| Binary convolutional neural network on RRAM T Tang, L Xia, B Li, Y Wang, H Yang 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 782-787, 2017 | 220 | 2017 |
| ForeGraph: Exploring large-scale graph processing on multi-FPGA architecture G Dai, T Huang, Y Chi, N Xu, Y Wang, H Yang Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 179 | 2017 |
| Thermal vs energy optimization for dvfs-enabled processors in embedded systems Y Liu, H Yang, RP Dick, H Wang, L Shang 8th International Symposium on Quality Electronic Design (ISQED'07), 204-209, 2007 | 176 | 2007 |
| Region ensemble network: Improving convolutional network for hand pose estimation H Guo, G Wang, X Chen, C Zhang, F Qiao, H Yang 2017 IEEE International conference on image processing (ICIP), 4512-4516, 2017 | 167 | 2017 |
| Ambient energy harvesting nonvolatile processors: From circuit to system Y Liu, Z Li, H Li, Y Wang, X Li, K Ma, S Li, MF Chang, S John, Y Xie, J Shu, ... Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 164 | 2015 |
| Stuck-at fault tolerance in RRAM computing systems L Xia, W Huangfu, T Tang, X Yin, K Chakrabarty, Y Xie, Y Wang, H Yang IEEE Journal on Emerging and Selected Topics in Circuits and Systems 8 (1 …, 2017 | 155 | 2017 |
| Graphh: A processing-in-memory architecture for large-scale graph processing G Dai, T Huang, Y Chi, J Zhao, G Sun, Y Liu, Y Wang, Y Xie, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 154 | 2018 |
| Spatial-temporal attention res-TCN for skeleton-based dynamic hand gesture recognition J Hou, G Wang, X Chen, JH Xue, R Zhu, H Yang Proceedings of the European conference on computer vision (ECCV) workshops, 0-0, 2018 | 154 | 2018 |
| RRAM-based analog approximate computing B Li, P Gu, Y Shan, Y Wang, Y Chen, H Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015 | 148 | 2015 |
| 14.3 A 65nm computing-in-memory-based CNN processor with 2.9-to-35.8 TOPS/W system energy efficiency using dynamic-sparsity performance-scaling architecture and energy … J Yue, Z Yuan, X Feng, Y He, Z Zhang, X Si, R Liu, MF Chang, X Li, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 234-236, 2020 | 145 | 2020 |
Yu Wang (汪玉)Department of Electronic Engineering, Tsinghua University, ChinaVerified email at mail.tsinghua.edu.cn
