Method for programming a multilevel memory FK Tsai, YF Lin US Patent 7,447,068, 2008 | 219 | 2008 |
Multi-stage charge pump without threshold drop with frequency modulation between embedded mode operations YF Lin, YS Lin, R Chen, CH Hung US Patent 7,595,682, 2009 | 85 | 2009 |
Ultra-High Endurance and Low IOFF Selector based on AsSeGe Chalcogenides for Wide Memory Window 3D Stackable Crosspoint Memory HY Cheng, WC Chien, IT Kuo, CW Yeh, L Gignac, W Kim, EK Lai, YF Lin, ... 2018 IEEE International Electron Devices Meeting (IEDM), 37.3. 1-37.3. 4, 2018 | 50 | 2018 |
Comprehensive Scaling Study on 3D Cross-Point PCMToward 1Znm Node for SCM Applications HLL W.C.Chien, H.Y.Ho, C.W.Yeh, C.H.Yang, H.Y.Cheng, W.Kim, I.T.Kuo, L.M ... 2019 Symposium on VLSI Technology, 2019 | 25 | 2019 |
Memory array with fast bit line precharge S Chou, LF Lin, YS Lin US Patent 7,082,069, 2006 | 19 | 2006 |
A no-verification multi-level-cell (MLC) operation in cross-point OTS-PCM N Gong, W Chien, Y Chou, C Yeh, N Li, H Cheng, C Cheng, I Kuo, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 16 | 2020 |
Adjusting method and circuit using the same YF Lin US Patent 7,863,934, 2011 | 15 | 2011 |
Method and apparatus for reading data from nonvolatile memory YF Lin, YS Lin US Patent 7,339,846, 2008 | 15 | 2008 |
Method for reading nonvolatile memory at power-on stage YF Lin US Patent 7,738,296, 2010 | 14 | 2010 |
Temperature compensated refresh clock circuit for memory circuits YF Lin US Patent 7,236,061, 2007 | 13 | 2007 |
Output buffer device YF Lin US Patent 7,786,761, 2010 | 11 | 2010 |
Charge trapping memory and accessing method thereof YF Lin, CH Hung US Patent 7,599,220, 2009 | 9 | 2009 |
Charge pump system and clock generator NP Kuo, SC Lo, WY Hsieh, Y Lin US Patent 6,768,366, 2004 | 9 | 2004 |
Method for programming a multilevel memory HY Ho, NK Zous, IJ Huang, YF Lin US Patent 7,961,513, 2011 | 7 | 2011 |
Memory, bit-line pre-charge circuit and bit-line pre-charge method JH Hsu, FN Liang, YF Lin US Patent 7,586,802, 2009 | 6 | 2009 |
Fast and accurate sensing amplifier for low voltage semiconductor memory YF Lin US Patent 7,483,306, 2009 | 6 | 2009 |
Method for burst mode, bit line charge transfer and memory using the same YF Lin US Patent 7,463,539, 2008 | 6 | 2008 |
Memory system and a voltage regulator YF Lin, YC Shih, KL Chang US Patent 7,400,536, 2008 | 6 | 2008 |
Charge pump system YF Lin, C Huang, TH Shiau, CH Hung, C Wu, Q Wang US Patent 9,214,859, 2015 | 5 | 2015 |
Twisted data lines to avoid over-erase cell result coupling to normal cell result YF Lin, KL Chang, CH Hung US Patent 8,085,611, 2011 | 5 | 2011 |